Free Webinar Will Discuss Choosing the Ideal Platform for LTE Elements

Mobile broadband is becoming a reality as the Internet generation grows accustomed to having broadband access wherever they go, and not just at home or in the office.

 

Out of the estimated 1.8 billion people who will have broadband by 2012, some two-thirds will be mobile broadband consumers – and the majority of these will be served by High Speed Packet Access and Long Term Evolution networks. According to a TMCnet report, operators can introduce LTE flexibly to match their existing network, spectrum and business objectives for mobile broadband and multimedia services.

 

In fact, more than 18 operators globally have announced LTE plans and a dozen intend to start deployments this year. LTE (News - Alert) represents the next big network equipment category spend for operators globally. Telecom equipment manufacturers are now challenged with choosing the right platform for LTE, which fulfills the critical requirements of a flat network architecture; high throughput, low latency and spectral efficiency maximization and facilitates a quick time to market.

 

TMCnet will moderate a Webinar entitled “Choosing an Ideal Platform for Building LTE eNodeB and EPC Elements,”on Jan. 13 at 12 p.m. ET, and will provide specific insights for equipment manufacturers as they assess hardware and software options for LTE. The Webinar will also address requirements for both access and core network equipment and will cover critical integration aspects including middleware, processors, chipsets and chassis platforms.

 

The presenters are: Sanket S. Nesargi, senior marketing manager of Aricent (News - Alert); YJ Kim, senior director and head of embedded processor group, Cavium Networks; Andrew Alleman, principal CTO director of Radisys; and Patrick Barnard, senior Web editor at TMCnet.

 

Attendees will learn about: the overall performance and latency requirements for LTE eNodeB and the Evolved Packet Core; detailed EPC platform requirements for control plane and data plane traffic handling; processor architectures, performance, power and cost models; design consideration for chassis and boards; and base station performance optimization in baseband, MAC scheduling, packet processing, ciphering and RoHC.