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October 30, 2006

CEVA Rolls Out Quad-MAC DSP Core for WiMAX and Multimedia Applications

By Laura Stotler, TMCnet Contributing Editor

CEVA Inc. has announced the CEVA (News - Alert)-X1641 Quad-MAC DSP core, an addition to the family of CEVA-X DSP cores that is compliant with the CEVA-X Instruction Set Architecture. The new core is designed to run computational intensive tasks that require substantial data throughput and high memory bandwidth.




The new core is fully synthesizable and offers enhanced memory architecture. This offers customers the flexibility to configure optimal memory size and structure for applications like WiMAX, WiBro, 3G Long Term Evolution and a number of advanced multimedia standards like the H.264 compression standard and VC1 main profile.

The DSP core is a combined VLIW/SIMD architecture and offers a number of features and enhancements that are required for high-performance 4G technologies and multimedia applications. Technologies like WiMAX are calling for the use of four MAC unites coupled with a 128bit data memory bandwidth to handle data rates of up to 100 Mbps, and the CEVA core delivers. It also incorporates specialized video instructions and mechanisms to accelerate multimedia processing in applications like mobile TV and video conferencing. It is designed to reduce frequency and power consumption while extending the battery life of mobile multimedia devices.

The CEVA-X1641 is compatible with the X1620 and X1622 DSP cores, which enables licensees to leverage a range of software and component available for the CEVA-X architecture. It is implemented in a small size as well, and is only five percent larger than the CEVA-1620 Dual-MAC core.

Features include four MAC units operating in parallel, eight-issue VLIW, 24 40-bit accumulators, 128bit data bandwidth, 8/16/32/40bit data operands and operations and 16/32bit instructions. The VLIW architecture enables a high level of concurrent instructions processing for extended parallelism as well as low power consumption. The SIMD architecture enables single instructions to operate on multiple data elements, resulting in code size reduction and increased performance.

“The CEVA-X1641 DSP core is in line with our strategy to offer platforms that will support the growing need for performance and power-efficient DSPs for emerging wireless and multimedia standards,” said Gideon Wertheizer, CEO of CEVA, Inc. “Our new, high-performance and fully synthesizable CEVA-X1641 DSP core will enable customers to expedite their time-to-market and reduce development costs by using the same platform across multiple, differentiated products.”

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Laura Stotler writes about IP Communications and related topics for TMCnet. She has covered VoIP and related technologies for seven years, contributing to Internet Telephony magazine and TMCnet, and as a freelance writer. To see more articles, please visit: Laura Stotler’s columnist page.


 







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