September 2000
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THAT'S SOME CHIP
BY CHRIS DONNER |
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Enabling Technologies And Development News
Echo Control Integration -- A Testing Program... |
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Voice over IP presents numerous problems to developers, not the least of
which is resolving addressing and priority issues at wire speed. After
all, what good will the next-gen network be to you if your network
equipment can only process packets at traditional speeds? For developers
interested in shortening their development time, getting to market faster,
reducing up front costs, creating flexible products, and still finding
that sweet spot that differentiates your product from others around it,
the answer to the problem of intelligent processing at wire speed is of
critical importance.
Fortunately, silicon designers are responding to the challenge.
Traditional DSP and ASIC companies looking to capitalize on the need for
faster, smarter chips are rolling out advanced network processors capable
of handling millions of packets per second. Not only does this result in
higher throughput, but it also means that developers of VoIP products can
use smaller packets for voice samples, helping to decrease delay, echo,
and jitter.
Intel has recently announced volume production of its high performance
network processor, the IXP1200, the flagship product of Intel's Internet
Exchange (IX) architecture, a framework designed to help developers build
next-gen networking and communications equipment. One of the benefits of
network processors in general, and one that Intel justifiably makes a big
deal about in its promotional literature, is that they are programmable.
Not only does this allow for software upgrades to products after they have
been deployed (when you realize that the "sure thing" standard
you designed for has been significantly altered in release), but it also
means shorter design times.
Consider that the design time for traditional ASICs can be a full year
or more. This delay affects time-to-market, as well as forcing developers
to make guesses (albeit, educated ones) about what the market will
need/want in a year's time. Of course, Intel isn't the only player looking
to get into this space. Agere (now affiliated with Lucent Microelectronics
Group), EZ Chip Technologies, T.sqware (recently acquired by GlobeSpan),
Motorola -- the list goes on and on, and there are some big names other
than Intel involved, as you can see.
So, would you like to get to market faster, with a more flexible
product that costs less to develop? If you answered no, then perhaps you
should consider getting into a field with somewhat less innovation or
creative thinking -- politics, for example. But if you answer a hearty yes
to all of the above, you might be interested in looking at what network
processors can do for you and the future of your product.
And for another example of "out of the box" thinking, check
out the sidebar this month by Tellabs on echo cancellation and development
processes. Once again, time-to-market is crucial, and Tellabs looks at how
time-to-market requirements can be met without sacrificing testing
quality.
-- Chris Donner
| Enabling
Technologies And Development News
Brooktrout Enables New
Network Applications Under Linux
Brooktrout Technology announced expanded Linux support
across its broad range of products. Developers who have chosen Linux
as their platform for building new network applications such as IP
telephony, unified messaging, voice portals, Web-IVR, enhanced call
services and switching now have the option of developing on
Brooktrout Technology's platforms including the Vantage Series, RDSP
Series, RTNI Series, TRxStream Series, and Netaccess Series product
families.
No. 511, comsolmag.com/freeinfo
New SBC Uses Intel's
Pentium III Coppermine Processors
The CT and Network Computing Division of Advantech
Technologies announced the availability of a new industrial strength
SBC, the PCA-6179. Driven by Intel's powerful Socket 370 Pentium III
Coppermine processors and packed with add-on options to meet desired
plug-ins and bus connections, the PCI/ISA card supports VGA/LAN/SCSI
connections and is suited to meet the mission-critical and high
performance needs of computer telephony, telecommunications, and
data communications integration in such applications as Web,
Internet, and telcommunication servers.
No. 512, comsolmag.com/freeinfo
I-Bus/Phoenix
Announces StingRay II+ SBC
I-Bus/Phoenix announces the StingRay II+, a Pentium III/Celeron
FC-PGA single-board computer. The StingRay II+ provides for a dual
Socket 370 upgrade path from the StingRay dual Slot 1 SBC. It's
based on the Intel 82440BX PCI chipset with MMX support, and
features a 66MHz or 100MHz internal bus speed and Socket 370
performance up to 850MHz with dual processing capability.
No. 513, comsolmag.com/freeinfo
IBM Announces
Availability Of SiGe Chips
IBM announced commercial availability of its next-gen
silicon germanium (SiGe) chip technology for high-frequency and
low-power communications applications. IBM's new SiGe technology can
be readily integrated with standard CMOS circuitry, enabling circuit
designers to incorporate additional logic and functions onto a
single, high-performance communications chip. It has been tapped to
fuel a variety of advanced chips, including radio transceivers and
low noise amplifiers for cell phones, Internet appliances, storage
devices, and other critical mobile communications applications.
No. 514, comsolmag.com/freeinfo
Spectrum Launches aXs
Family Of Packet-Voice Processing Engines
Spectrum Signal Processing announced the launch of the aXs Family of
Voice over Packet solutions to enable the next-generation of
converged network applications. aXs Solutions are board-level
products that allow leading telecommunication OEMs to accelerate
their time-to-market by rapidly integrating high density, low cost
voice-processing solutions into their next-gen infrastructure
equipment. The advanced voice-processing capabilities allows OEMs to
offer their customers new revenue-generating voice service equipment
as well as cost-reducing efficiencies in their networks. The aXs
Family initially includes the aXs.500 Series of Packet-Voice
Processing Engines, complete board-level, modular solutions that are
pre-configured with voice compression, fax relay, echo cancellation,
telephony processing, and packet processing functionality. The
modular format allows an aXs.500 Solution to be directly integrated
with custom or standard carrier-boards for OEM deployment.
No. 515 , comsolmag.com/freeinfo
MUSIC Semiconductors,
Wind River To Build Epoch Reference Design
MUSIC Semiconductors has partnered with Wind River Systems
to build the Epoch Reference Design, a board-level solution complete
with software, to demonstrate the use of the MUSIC Semiconductors'
Epoch device in a networking application. Epoch is a multi-layer
switch-on-a-chip that performs packet processing at Layers 3 and 4
of the protocol stack at 1.4M packets per second. The Epoch
Reference Design is the first in a series of reference designs that
the Wind River Services business unit will create for MUSIC
Semiconductors.
No. 516, comsolmag.com/freeinfo
Blue Wave Extends
Comstruct Support For 3G Wireless Infrastructure
Blue Wave Systems has extended its support for 3G wireless
infrastructure equipment by integrating GSM-AMR (Adaptive Multi
Rate), the selected codec for 3G wireless, into its ComStruct
product line. This will allow telecom equipment manufacturers to
significantly reduce the time required to develop and deploy next-gen
mobile communications systems. The new GSM-AMR codec standard will
offer near wireline quality speech transmission and improved
bandwidth utilization, and has been selected for evolved GSM, UMTS,
and WCDMA networks by the Third Generation Partnership Project
(3GPP), the global cooperative of standards organizations for next-gen
wireless communications. Blue Wave's ComStruct line of telecom
products now delivers a deployment-grade software platform -- which
provides control and management of signal-processing algorithms --
to enable the easy and rapid implementation of the GSM-AMR codec in
test, simulation, and deployed network environments.
No. 517, comsolmag.com/freeinfo
Aculab Enters VoIP
Market With VoIP PCI Card
For computer telephony developers and integrators who are seeking to
implement conversation quality speech over IP networks, Aculab now
offers the VoIP PCI card. This standards based H.323 gateway offers
60 channels with low latency, all in a single PCI slot, with the
option of 60 E1/T1 channels via a daughter module. Aculab's product
offers: ease of use through a simple familiar API; scalability;
optimal use of channels; and fully specified performance
characteristics. The card fits seamlessly into Aculab's product
portfolio. Aculab's VoIP PCI card uses an extension of Aculab's
generic API, allowing developers to leverage VoIP through their
existing applications. For new users all that is required is to
master a couple of API commands or function calls.
No. 518, comsolmag.com/freeinfo
Agilent FASTest
Accelerates Internetworking Between Traditional, IP Networks
Agilent Technologies introduced a system to automatically
test the interoperability between traditional and IP-based telecom
networks. Agilent FASTest 4.0 enables network equipment
manufacturers and service providers to decrease test times and
deliver next-gen telephony capabilities ahead of the industry and at
tremendous cost savings. Agilent's new FASTest meets the
interoperability testing demands of network operators and equipment
manufacturers introducing new systems that deliver VoIP services via
the Session Initiation Protocol (SIP). FASTest tests SIP function as
well as the internetworking between these new systems, traditional
SS7 networks, and access networks. FASTest helps ensure that VoIP
services duplicate important traditional phone network standards,
including call set-up times, routing, and availability of services
like 1-800 numbers.
No. 519, comsolmag.com/freeinfo
Ishoni's
Gateway-On-A-Chip Offer Complete IAD Solution With Conexant
Ishoni Networks announced an agreement to interoperate its broadband
Gateway-on-a-Chip with Conexant Systems' entire line of ZipWire SDSL
and ZipWire2 G.shdsl/HDSL2 modem chips. The agreement means that
OEMs can more quickly and more easily build SDSL gateway products
that include full voice, data, and security capabilities. ishoni's
relationship with Conexant is part of ishoni's "TotalDSL"
initiative to achieve PHY, DSLAM, and VoDSL interoperability with
the respective leaders in each DSL market. As a result, OEMs will be
able to build an IAD for any type of DSL connection using the same
ishoni Gateway-on-a-Chip in every device.
No. 520, comsolmag.com/freeinfo
Radisys, Intel
Announce Development Agreement
RadiSys Corp. has signed an agreement with Intel Corporation
to develop products and technology relating to the Intel Internet
Exchange (IX) architecture, a framework for designing powerful and
flexible networking and telecommunications equipment using
reprogrammable silicon. Under the agreement, RadiSys will develop
and market semiconductor companion chips for the Intel IXP1200
Network Processor, such as chips that connect the IXP1200 to various
types of communications buses and protocols. Additionally, RadiSys
will develop and market board-level solutions that incorporate the
IXP1200.
No.521, comsolmag.com/freeinfo
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| Echo
Control Integration -- A Testing Program To Improve Time-To-Market And
Quality
BY DAVE GOODWIN
Integrating ever more complex technologies into a coherent end product
is every engineer's challenge and nightmare. In our fast-moving
telecommunications industry, there is a constant drive towards achieving
ever smaller, denser, more efficient solutions that operate seamlessly in
a complex mix of sophisticated systems. Echo cancellation is an ideal
candidate to scrutinize in this respect, with the main purpose of an echo
canceller being to cancel echo and improve voice quality. The new
generation IP networks require a highly sophisticated set of echo control
solutions to preserve voice quality. Today, density is king, with the
current world record standing at 1,024 channels of echo cancellation on a
single mezzanine card. Nowhere is the pressure greater to achieve finished
product faster.
These engineering pressures often require a fundamental re-evaluation
of basic working practices, if quality and time-to-market issues are to be
met. On the negative side, this can result in a temptation to improve
time-to-market by reducing or completely eliminating testing -- arguably
producing short-term, albeit false, savings. Our recent experience within
the NETS Group provides a useful demonstration of the opposite approach.
On the face of it, the path we decided to take appears to fly in the
face of more usual practices. Our program anticipated the introduction of
a new generation of highly complex echo cancellers, with the need to
improve time-to-market being a top priority. We therefore turned things on
their head and decided to reassess the whole testing process, resulting in
a significant additional investment in terms of both resources and time.
We believed that this approach would produce the best combination of
quality and time-to-market improvements.
The rationale behind this may appear slightly counter-intuitive, but it
does work. First, the complexity of the products requires that they be
treated as systems rather than as independent modules, involving the
integration of these "sub-products" to the product as a whole.
In practice, this means that engineering teams have to come out of their
traditional "corners" and pool resources in a truly co-operative
spirit. By raising the importance of the testing element -- in this case
through the formation of a new test group, the NETS Integration Test Group
(ITG) -- many of the traditional inter-group barriers can be eliminated.
The ITG's role includes the task of validating the integration of the
many sub-systems prior to the product entry to systems/application
testing. By working closely with development engineering, issues can be
identified and resolved at the earliest possible stage prior to Beta. In
practice, the ITG has routinely used "out of the box" ideas to
redefine the testing paradigm. This philosophy has contributed greatly to
the reduction of time-to-market of several major new platforms, while at
the same time enhancing the quality.
The benefits result from a truly integrated operational approach. Being
part of the development community, ITG is aware of issues and concerns
expressed by the engineering staff and can plan accordingly in advance of
load deliverables to facilitate testing. This approach also allows a more
"open" relationship when accepting loads, allowing the ITG team
to gain experience with the product, while at the same time giving very
early feedback to the engineering staff on product progress. Also, by
sharing a common management structure, potential high visibility issues
can be resolved before they leave the engineering manager's direct
organization.
An important element is ensuring that developers get the earliest
possible feedback, with quality therefore improving as a direct result of
more bugs being found earlier in the whole development cycle. This in turn
enables the development teams to devote more time prior to a product being
released into beta.
The lesson of the exercise is simple: in today's engineering
environment, teamwork is of paramount importance. The traditional walls
between disciplines have to come down and new methodologies be established
in the quest for better industry practice overall.
Dave Goodwin is Development Manager Network Enhancing Technologies
Solutions (NETS) Group, Tellabs.
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