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feature.GIF (5781 bytes)
May 1999


A Glimpse Into The Future Of CompactPCI

BY CHRIS DONNER

As someone who receives innumerable press releases, outlooks on the industry, and positioning statements each day of the work week, believe me when I say that there is something happening with CompactPCI. More and more frequently I see offerings from all kinds of vendors - board developers, industrial computer manufacturers, switch designers - boasting of their adherence to and use of the CompactPCI form factor.

Recently I had the opportunity to travel to the West Coast and take part in the Motorola-sponsored MediaDay IV. This event detailed many of the recent achievements in the field of CompactPCI, as well as pointing out some areas that will require more attention and development in the future. Participants in the event included traditional CTI players such as Dialogic, Natural MicroSystems, Ziatech, and Force Computers, as well as some other voices. Notable inclusions were operating systems vendors - both Sun Microsystems and Microsoft Corporation were present, with Microsoft delivering the opening presentation. A few days after the Motorola event, Microsoft and Dialogic announced that Microsoft would be playing a bigger role in the telecommunications space through an investment in Dialogic and involvement in Dialogic's CT Media. (For more on this announcement, please see Rich Tehrani's Publisher's Outlook in this issue.)

A NEED FOR SOFTWARE
The inclusion of operating system vendors is significant. The various presenters at Media Day IV were pretty much unanimous in stating that the software field is the area where CompactPCI currently still needs the most work. PICMG (PCI Industrial Computers Manufacturers Group) and board/chassis vendors have been quite successful thus far in realizing hardware interoperability and support for hot-swap and high-availability systems through CompactPCI. However, as Joe Pavlat, PICMG's president, clearly pointed out, hardware is only one piece in the puzzle.

One important software issue that must be addressed is how the operating system (OS) is made aware of and compensates for board-level changes, as well as how the OS is able to handle the use of multiple processors to provide both greater processing capabilities and failover in case of a CPU failure. This relationship between the hot-swappable components (including the CPU itself) and the OS is crucial to achieving telco-grade reliability on CompactPCI platforms.

One company addressing this issue directly is Pigeon Point Systems. Pigeon Point is working directly with Microsoft and PICMG on the Hot Swap Infrastructure Project to insure that Windows 2000 (Windows NT 5.0) supports hot-swap in a plug-and-play architecture. This development process consists of two components: 1) managing of the platform/board hardware independently of the platform/board vendor, and 2) using plug-and-play to accomplish hot-swap software connection.

On the hardware side, the core hot-swap driver manages all hot-swappable boards independently of the board vendor, as long as the boards support the CompactPCI hot-swap specification. However, some parts of the physical removal process are platform-specific, such as how the system handles the ENUM# - a status indicator that the central processor detects when polling available slots and which lets the CPU know the state of the boards in these slots to provision system resources. On the software side, the goal is to allow standard, hot-swappable devices with self-contained drivers that will support standard plug-and-play hardware and Windows NT drivers.

The importance of addressing the software side of hot-swap was also stressed during the presentation by Sun Microsystems. Sun cited statistics demonstrating that 92% of all system failures are software related. This accounts for the vast majority of system downtime. Additionally, while hardware vendors abound, there are relatively few vendors who have control over system software - and Microsoft and Sun are two of the biggest players in this area.

CLUSTERING
Sun proposed that a possible way to address the software failure issue was by using clustering to gain the benefits of fault-tolerant systems without incurring the associated expenses. Additionally, clustering allows more flexibility in deciding which operating system(s) to run on a system. Both clustering in general and the operating system flexibility are key differences between Sun's strategy and Microsoft's. Unix is generally perceived as offering more advanced clustering capabilities than Windows NT, although Microsoft is working hard to alter this perception, and the flexibility to use various operating systems across a cluster mean that a carrier or service provider won't be locked into using only Windows or only Unix across a particular node.

Clustering alone isn't sufficient to allow for true fault tolerance in a network, however, and there are a few important conditions that must be met. Among others, Sun cited the need for: dynamic addition/subtraction of node elements and nodes themselves, high-availability foundations and parallel extensions for standard databases, cluster specialization, and remote global management facilities. Some future challenges Sun pointed to for the CompactPCI development community include: high-speed clustering interconnects, leveraging existing closed cluster environments, and reducing clustered domains to a single backplane.

Force Computers also addressed the issue of clustering to achieve high-availability systems. A key question asked by Force was: When do I detect the failure in my system? Given an early enough detection - prior to the failure affecting the application - failover can occur more easily, and recovery can take place more quickly. A high-availability cluster system would be suitable for database and network management applications, allowing failover times that average 30-60 seconds per incident. But carrier grade, five-nines reliability would require host hot-swap features, an area where a great deal of software work is yet to be done.

CompactNET - ONE ALTERNATIVE
Ziatech Corporation also had some ideas regarding increasing system performance and allowing for modularity by using multiple systems, although instead of clustering, they focused on multiprocessing. The idea behind Ziatech's CompactNET architecture is interesting. Utilizing the PCI resource arbitration inherent in the CompactPCI bus architecture, CompactNET allows multiple processors to be linked together over the CompactPCI bus, which the processors perceive as nothing more than an Ethernet connection. The processors are joined in a "multiple-master" configuration, in which each processor is responsible for driving its own data/control signals to the backplane. In this manner, CompactNET allows for full-mesh connectivity between system processors - any CPU can communicate with any other CPU in the backplane without involving an external "master."

The benefits of Ziatech's multiprocessing approach are significant: multiprocessing systems are generally faster and easier to develop on than single-processors systems running multi-threaded, multi-tasking operating systems. Maintenance and upgrades to multiprocessing systems should be more straightforward than on dedicated systems. Additionally, the bandwidth available to CompactNET systems increases as nodes are added. And finally, it is beneficial to be able to use multiple operating systems. For example, an application might be run more effectively with a real-time operating system, while the interface for the user might be more functional if provided through a GUI on a general-purpose operating system.

OPEN SOURCE CompactPCI
Readers of Brough Turner's "On The Horizon" column in CTI will already be familiar with his announcement of Natural MicroSystems' Open Source for Open Telecom initiative. The announcement of this initiative was initially made at Media Day IV, and it was quite significant for the various players in the field of CompactPCI.

The www.opentelecom.org Web site includes not only information about CompactPCI but actual source code for such things as Natural MicroSystems' CT Access hot-swap infrastructure, point-to-point circuit switching service, and sample device drivers. NMS has released this code under Open Telecom Public License, which derives much of its language from the Mozilla Public License (www.mozilla.org) that Netscape Communications Corporation used in making public the source code of the Communicator 5.0 Standard Edition. (For more information on open source, visit www.opensource.org.)

NMS took this rather surprising step in an effort to drive growth in CompactPCI market for the telecom market. The idea behind the release is that a booming market will be more profitable for NMS (and other vendors) than a slowly developing market would have been had NMS kept their source code in-house. Additionally, the open source model is meant to promote interoperability and use of standards, since other board vendors might easily model their own drivers and coding on NMS's working code.

As of March 4, PICMG voted to endorse the Open Source for Open Telecom initiative. In addition, the PICMG executive membership voted to authorize the officers of the organization to bring the Open Telecom initiative into the PICMG sphere of activities, as a model for future software enhancement efforts. "The Open Source model and the specification model both have their places in PICMG," said Joe Pavlat. "They will complement each other in providing both definition and implementation details."

SUMMARY
Overall, the message at Media Day IV was quite positive. There is a sense of accomplishment among the participants, in that PICMG has released, and the vendor community has responded to, several standards defining critical hardware issues for CompactPCI and hot-swapability to become a reality. There is also a sense of challenge and excitement regarding the much needed software solutions that will allow CompactPCI to provide the true five-nines reliability needed in the telecom space. With continued focus on software specifications and solutions that build on what has already been accomplished on the hardware side, CompactPCI is clearly becoming a major force in the telecommunications industry.

Chris Donner is associate editor of CTI magazine. He can be reached for comment at lguevin@tmcnet.com.


CompactPCI News

Sun Expands SPARCengine CP CompactPCI Family With UltraSPARC IIi Processors
Sun Microsystems announced the expansion of its SPARCengine CP family of single-slot CompactPCI boards with three new offerings: the CP 1500 at 425 MHz and 360MHz, and the CP 1400 at 300 MHz. These releases employ Sun's UltraSPARC 64-bit IIi processors with the Solaris 7 64-bit operating system. The combination of Solaris and UltraSPARC makes the SPARCengine CP family ideal for designing software applications without the need to recompile. Additionally, the CP 1400 and 1500 are designed and tested to meet NEBS-Level 3 telecommunications compliance for board-level products. Both boards support real-time operating systems, such as Chorus OS and VxWorks. The CP 1400 300MHz, volume priced at under $2000, will begin shipping in May 1999. The CP 1500 360MHz, volume priced below $3000, will ship in June 1999, while the 425 MHz version, volume priced below $4000, will be available July 1999.

I-Bus Announces New CompactPCI CPU: Polaris
I-Bus announced the Polaris CompactPCI CPU board as the latest addition to its CompactPCI line of products. Based on the Intel 82443BX chipset, Polaris can be configured with up to dual 450MHz Pentium II MMX processors running at an optimized 100 MHz system bus frequency. Polaris is equipped with Ultra Wide SCSI, AGP video, and Ethernet, freeing up backplane slots for resource boards. Polaris also provides up to 512 MB of unbuffered and registered SDRAM using two DIMMS. The front panel of Polaris includes interfaces for USB, Ethernet, and video, as well as a DB9 serial port, a DB25 parallel port, and mini-DIN connectors for a PS/2 mouse and keyboard.

Ziatech Introduces Redundant Intel CPU Architecture to CompactPCI
The Ziatech 5083 System is a cost-effective, high-availability CompactPCI system designed to meet strict five-nines availability. The system has built-in redundancy for active components, including system slot CPU boards, power supplies, and alarms, and it can be configured with an optional RAID disk subsystem. Supporting up to 12 CompactPCI peripherals, the 5083 is a 15U rackmount system that is PICMG 2.1 (hot swap spec.) and PICMG 2.5 (computer telephony spec.) compliant and accommodates IEEE 1011.11 rear I/O transition cards. The system also includes software features needed to implement a high-availability system under Windows NT, including BIOS diagnostics, a development utility, and a Desktop Management Interface for control of system-level components.

Summit Microelectronics Introduces Fully Integrated cPCI Controller
The SMH4042 device is the second in a series of programmable hot-swap controllers from Summit Microelectronics, and it is designed for use in communications systems. The SMH4042 device provides all the control functions necessary to meet the requirements of the hardware connection control layer of the CompactPCI specification, including provision of a local PCI reset signal to the backend logic, a "healthy" signal to notify the host system that board-level voltages are at specified levels, and a one-volt reference output to meet CompactPCI specification requirements that I/O signals be pre-charged to one volt so as not to disturb an active data bus during insertion.


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