Xpeedic On-Chip Passive EM Simulation Suite Certified for Samsung Foundry 8LPP Process Technology
Xpeedic today announced that its on-chip passive EM simulation suite has been certified by Samsung (News - Alert) Foundry for its advanced 8LPP (8nm Low Power Plus) process technology. The certification of Xpeedic's fast 3D planar EM simulator IRIS and automated fast PDK model generation tool iModeler enables IC design companies to accelerate their delivery of 8LPP designs.
Samsung Foundry's 8LPP technology delivers optimized power, performance and area over previous generations of its advanced FinFET nodes. 8LPP provides great benefits for applications including mobile, networking, server, automotive and cryptocurrency, and is regarded as one of the most attractive process nodes for many other high-performance applications.
"As the design complexity increases at advanced process nodes, accurate EM simulation is critical for our customers to achieve first-pass silicon success," said Jongwook Kye, Vice President of Design Enablement Team at Samsung Electronics. "With the qualification of Xpeedic's 3D full-ave EM suite, our mutual customers will be able to create models and run EM simulation with confidence."
"We are very pleased that IRIS has been able to meet Samsung Foundry's accuracy requirement and thus certified for its 8LPP process," said Dr. Feng Ling, CEO of Xpeedic. "As a Samsung Advanced Foundry Ecosystem (SAFE) program member, Xpeedic will continue the collaboration with Samsung Foundry on various process technologies to help our mutual clients with innovative solutions and services."
IRIS is the state-of-the-art EM simulation technology tailored for Advanced Process Nodes. It provides full-wave accuracy from DC to THz, and speedup with both multicore parallelization and distributed processing. It has sophisticated advanced process node features such as width/spacing-dependent metal bias, and is widely adopted by fabless design companies. iModeler automates the PDK model generation with the rich set of built-in templates and the fast IRIS solver engine. It is ideal for PDK engineers to generate parameterized models.
Xpeedic is a leading provider of EDA solution for IC, package and system designs. The analog/mixed-signal IC tools help IC engineers shorten their design cycle at the latest advanced semiconductor nodes. The signal integrity tools enable faster design closure for IC package and PCB system designs. The growing IP portfolio on IPD delivers industry-leading combination of performance and integration to enable SiP for RF front-end module designs. Founded in 2010, Xpeedic has offices in both China and US.
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