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Technology Analysis of TSMC's Silicon Capacitor Deep Trench Capacitor - Research and Markets
[June 27, 2017]

Technology Analysis of TSMC's Silicon Capacitor Deep Trench Capacitor - Research and Markets


Research and Markets has announced the addition of the "TSMCSilicon CapacitorDeep Trench Capacitor: Technology Analysis" report to their offering.

Due to TSMC, Integrated Passive Devices (IPD) are back in the mobile industry. Information about the Apple (News - Alert) A10 application processor (AP) integrated into the firm's latest flagship, the iPhone 7, mentions the use of the first PoP Wafer Level Packaging for consumer devices developed by TSMC, called integrated Fan-Out - Package-on-Package (inFO-PoP). To enable this, TSMC has also integrated a brand new technology that has never been proposed before for high volume products. It is using high-density Deep Trench Capacitors (DTCs) on silicon substrates as and-side decoupling capacitors.



Located under the inFO-PoP, the Land-Side Capacitor (LSC) is in flip-chip configuration and supported by an extra layer on the printed circuit (PCB). The LSC has been developed by TSMC using trench capacitors to increase the capacitive area without changing the footprint of the component. This can compete with multilayer ceramic capacitor (MLCC) technology.

In this report, we show the differences from ceramic technology and the innovations of this capacitor, including the trench silicon, oxide deposition and electrical performances. The process is compared to IPDiA technology. Detailed comparison with the LSC in the Exynos 8 and the Snapdragon 820 APs will explain the pros and cons of TSMC's LSC technology.


This DTC process enables TSMC to offer a very thin capacitor, with high density and the same footprint as a MLCC 0204 component. The result is very cost-effective, as comparisons with ceramic capacitors in this report will show.

For more information about this report visit https://www.researchandmarkets.com/research/9ld33t/tsmcsilicon


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