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Altera Assigned Patent for Integrated Circuit Resistors with Reduced Parasitic Capacitance

[November 10, 2014]

Altera Assigned Patent for Integrated Circuit Resistors with Reduced Parasitic Capacitance

(Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service ALEXANDRIA, Va., Nov. 10 -- Altera, San Jose, California, has been assigned a patent (8,878,334) developed by Albert Ratnakumar, San Jose, California, and Peter Smeys, San Jose, California, for the "integrated circuit resistors with reduced parasitic capacitance." The patent application was filed on March 23, 2012 (13/429,284). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,878,334.PN.&OS=PN/8,878,334&RS=PN/8,878,334 Written by Kusum Sangma; edited by Jaya Anand.