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Design and Development of an Array of Dielectric Suspended Membranes for Microhotplate Applications [Sensors & Transducers (Canada)](Sensors & Transducers (Canada) Via Acquire Media NewsEdge) Abstract: The paper presents the design, fabrication and characterization of an array of suspended dielectric suspended membranes for microhotplate applications. A single cell membrane (100 µm × 100 µm) made of two different dielectric layers: SiO2 and Si3 N4 separately, was designed and simulated using ANSYS 10.0. The simulation of stress generated in different dielectric membranes as a function of temperature is reported. The thickness of both layers was taken as 0.3 µm. The membranes of both SiO2 and Si3 N4 dielectrics were fabricated on silicon substrate by bulk micromachining technique using TMAH solution. The buckling of the beam and breakage of membranes made of high-stress Si3 N4 film are reported. The simulated results were verified by experiments. The membrane made of SiO2 layer was found to be more suitable in comparison to high-stress Si3 N4 layer for microhotplate applications. The present approach provides high yield at low cost for fabrication of microhotplates for gas sensing applications. Copyright © 2014 IFSA Publishing, S. L. Keywords: Bulk micromachining, Suspended membrane, TMAH. 1. Introduction The dielectric thin films such as Si02, Si3N4 and combination of both are widely used in semiconductor and microelectromechanical system (MEMS) devices [1-5]. The metal oxide-based gas sensor requires elevated temperatures 250-600 °C to detect the hazardous gases like carbon monoxide (CO), methane (CHLt) and ozone (03) etc. [6]. In microhotplate-based gas sensor, the membrane of these dielectric films is used as a platform for gas sensing [7-9]. In some cases, to reduce the stress of the membrane, the combination of both Si02 and Si3N4 layers is preferred [10-13]. Since silicon is a good heat conductor, therefore it must be removed from underneath the microhotplate membrane to achieve high thermal efficiency [14]. The removal of silicon from selected regions to form the suspended structure can be accomplished by using bulk micromachining or surface micromachining techniques [15-17]. The thermal conductivity of gas strongly depends on the gap between the membrane and the substrate, and has a microscale effect [18]. In the present work, bulk micromachining technique was used to form the suspended structures. Anisotropic wet etching of silicon is one of the key technologies for fabricating the microstructure and MEMS devices. The compatibility of CMOS process with MEMS fabrication is necessary for monolithic integration of analog and digital circuits to provide the signal conditioning and interface control. The chemical etchants used for fabrication of microstructure should be compatible with commercial CMOS processes because of low-cost manufacturing. The most common etchants used for anisotropic etching of Si are ethylenediamine-pyrocatechol (EDP) water, KOH, hydrazine-water (N2H})n solutions and TMAH. The selective etching of silicon can be done using (N2H4)n solutions with minimum damage to metal films. However, due to relatively high toxicity, this etchant should be handled carefully. Potassium hydroxide is an alkali metal hydroxide etchant, which has high silicon etching rate and anisotropic etching capability. But, unfortunately, it is not compatible with CMOS processing because it attacks exposed aluminum and contaminates the gate oxide with alkali mobile metal ions. The EDP solution is a diamine-based etchant, which gives anisotropic etching by adding a small amount of pyrazine. However, it is a hazardous solution with long-term toxic effects. The evaporation of EDP solution during etching is a serious inhalation hazard. Tetra methyl ammonium hydroxide (TMAH) belongs to quaternary ammonium hydroxide group, which fulfills the requirement of CMOS compatibility. It has the advantages of high etch rate, better etch characteristics, less attack on metal, and low toxicity. Nowadays, several researchers have reported the bulk micromachining of Si using tetra methyl ammonium hydroxide (TMAH) [19-25]. In the present work, the TMAH solution was used for bulk micromachining of silicon to form the suspended membrane of dielectrics layers, Si02 and Si3N4. Many researchers have reported the different designs and fabrication processes of the dielectric membranes for microhotplates [10-13]. But, they have not presented the comparison between Si02 and Si3N4 membranes for microhotplate applications. This paper reports the comparison of yield obtained in the fabrication of different dielectric membranes on 4-inch silicon wafers for microhotplate platform. The selection of thickness of membrane is important in the fabrication of microhotplate because it affects the operating temperature of microhotplate at an applied voltage. If the thickness of dielectric membrane is increased, then at an applied voltage, the temperature of the membrane decreases while the mechanical displacement of the membrane is reduced [26]. In order to maintain the operating temperature of the hotplate for higher thickness of membrane, more power is required. Therefore, in the present case, the membrane of 0.3 pm thickness was selected for both dielectric layers, Si02 and Si3N4 separately. 2. Design and Simulation An array comprising four 100 pm x 100 pm unit cells of dielectric membranes has been designed using L-Edit software, as shown in Fig. 1(a). The structural dimensions used in the simulation are given as follows: die size, 2.1 mm x 2.1 mm; cavity size is 300 pm x 300 pm and width of the supporting arms is 30 pm. The complete design consists of four trapezoidal openings to allow post-process etching of exposed silicon, forming a pit so that the membrane can be suspended in the air. There are four supporting beams for each membrane, which gives the mechanical strength to the membrane and the connections for the heater. The single-cell dielectric membrane has the dimensions of 100 pm x 100 pm over which a heater is laid out. The mechanical stress simulation of the membrane is required in order to establish the geometrical characteristics of the structure. To verify the design, mechanical stress simulation of the unit cell of dielectric membrane has been carried out using ANSYS, widely used finite element-based software for simulation of MEMS devices. The designed structure consists of the silicon substrate over which there is a thin dielectric layer of 0.3 pm thick and a 50 pm deep cavity to form the suspended membrane [Fig. 1(b)]. In the designed unit cell, the silicon layer underlying the hotplate has been extruded to form the suspended structure. In the simulation work, SOLID69 element has been used, which supports the basic thermoelectric analysis taking joule heating effect into consideration. The SOLID69 element type has 3D thermal and electrical conduction capability. At constant applied voltage, the thickness of membrane was increased from 0.3 pm to 3 pm, resulting in decrease of temperature of microhotplate [26]. This decrease in temperature is due to the heat losses to the silicon substrate layer via conduction through micro bridges. Therefore, 0.3 pm-thick dielectric membrane was chosen for analysis. FEM mechanical stress simulation of both Si02 and Si3N4 membranes was performed by applying different temperatures (300 to 600 °C) to the membranes separately. The generated stress and displacements in the Si02, and Si3N4 membranes have been studied separately. Standard values of physical constants and material properties used in simulation are given in Table 1. In mechanical stress simulation, a temperature of 300 °C was applied to both membranes separately. The temperature of Si substrate surrounding the membrane was fixed at 25 °C as the boundary condition. The typical ANSYS plots of von misses stress distribution and vertical displacement in case of Si3N4 membrane at 300 °C is shown in Fig. 2(a). The magnified view of von misses stress distributions at the arm edge connecting the surrounding regions is shown in Fig. 2(b). It was observed that the maximum generated stress range is 439-494 MPa. Similar simulations were done by applying the different temperatures 400-600 °C in steps of 100 °C for both Si02 and Si3N4 membranes. The membrane thickness 0.3 pm was fixed in all the cases. The simulated results of temperature versus von misses stress and temperature versus displacement for both dielectric membranes are shown in Fig. 3(a) and Fig. 3(b) respectively. It was observed from Fig. 3(a) that due to thermal effect, higher stress is generated in Si3N4 membrane in comparison to Si02 membrane. Also, it was observed that the stress linearly increases with increasing temperature in case of Si3N4 membrane whereas it slowly increases in case of Si02 membrane. Similar effects were observed in Fig. 3(b). 3. Experimental Details and Characterization The fabrication of micromachined structures of different membranes is started with the selection of 4-inch double sided polished P-type <100> silicon wafers. The resistivity of these wafers was 10-20 Ohm-cm. Before starting the thermal oxidation Si02 and low pressure chemical vapor deposition (LPCVD) process, the silicon wafers were cleaned as follows: i) The wafers were rinsed with deionized (DI) water of resistivity 18 mega Ohm for 30 minutes to remove a large fraction of ionic impurities present on the surface except H* and OH'ions. ii) These wafers were cleaned in a heated nitric acid for 20 minutes to remove the heavy metal contaminants from the wafer surface. iii) RCA-1 cleaning was then performed by making the solution of DI water, NH4OH and H202 in a ratio of 5:3:3 respectively. The wafers were immersed in this solution for 30 minutes at around 80 °C temperature. This cleaning removes all organic residues and certain metal contaminants. iv) RCA-2 cleaning was then done by making the solution of DI water, HCl and H202 in a ratio of 5:3:3 respectively. The wafers were cleaned in this solution for 30 minutes at 80 °C temperature. This cleaning removes all atomic and ionic contaminants from the wafer surface. After cleaning, the wafers were dried with nitrogen gas and loaded in oxidation furnace at temperature 500 °C to avoid any crack due to rapid temperature change. In the first experiment, 0.3 pm-thick Si02 layer was thermally grown in a sequence of dry-wet-dry cycle at 1000 °C. Dry oxidation was performed for 10 minutes, then wet oxidation for 40 min, and again dry oxidation for 10 minutes at 1000 °C. The 02 gas flow during dry and wet oxidation was 6 SLM (standard liters/min) and 1 SLM 02 respectively. However, in case of wet oxidation, 02 gas was passed through DI water was kept at 95 °C. In the second experiment, the Si3N4 layer was deposited on P-type <100> silicon wafers. Before Si3N4 layer deposition, the wafers were cleaned similar to the cleaning steps of the first experiment. In silicon nitride deposition by LPCVD, 80 seem (standard cubic centimeter) NH3 and 20 seem dichlorosilane (DCS) gases were used at 800 °C temperature. The vacuum was 270 mtorr and the deposition time was 80 min. Photolithography was done on both Si02 and Si3N4-deposited wafers using mask#l (for cavity opening). In this process, positive photoresist S1818 was used. The process recipe for spin coating of photoresist is given in Table 2. After coating, wafers were soft baked at 95 °C for 30 min in a temperature-controlled oven. The UV exposure of 3.5 sec was given by putting the cavity mask into MA6 Double Sided Mask Aligner. Then the photoresist was developed for 1 min in MF-312 developer. After developing, the photoresist was hard-baked at 120 °C for 30 min in a temperaturecontrolled oven. Both the Si02 and Si3N4 layers from the wafers were removed separately by buffered hydrofluoric acid and reactive ion etching respectively. In case of reactive ion etching of silicon nitride layer, 40 seem SF6 and 4 seem 02 were used. The vacuum during the process was 10 Pa and the power was 600 W. After cavity opening, thickness of both dielectric layers was measured by Dektak 6M surface profiler and the plots are shown in Fig. 4(a) and Fig. 4(b) respectively. In Fig. 4(a), the stylus of the profiler moves from point A to B on silicon dioxide surface. From point B to C, it goes down towards silicon surface and then travels from point C to D on the silicon surface of the structure. It starts climbing up the silicon dioxide wall from point D to E and ends at point F. The average step height (ASH) from point B to C or D to E is measured as Si02 thickness and found to be 0.3 pm. Similar measurement is done in case of Si3N4 [Fig. 4(b)]. The average step height (ASH) from point B to C is measured as thickness of Si3N4 and found to be 0.27 pm. Now, anisotropic etching of silicon was performed on these wafers. In this process, 25 % TMAH solution was used. The dielectric layers Si02 and Si3N4 served as masking layers during bulk micromachining of silicon. All the experiments were carried out in a glass vessel with rotating Teflon-made boat at 4 rpm. The temperature of TMAH solution was kept constant at 65 °C by means of a temperature-controlled hotplate. The silicon etching was done for fabrication of both silicon dioxide and silicon nitride membranes. The etching time and solution temperature were kept as approximately 4 hours and 65 °C. The cavity depth was measured by Dektak 6M surface profiler, similar to Fig. 4(a). The average step height (ASH) from point B to C or D to E (Fig. 5) was measured as cavity depth and found to be 45.0 pm. First, the silicon nitride membranes were observed by SEM. It was found that the supporting arms of the membrane were bent at the edges connecting the substrate surrounding the membrane. An array of fabricated silicon nitride membranes is shown in Fig. 6(a). A SEM image of a single silicon nitride suspended membrane is shown in Fig. 6(b). The bended portion of the arms, supporting the membrane is encircled. The bending in the arms produces the low yield of the device and may damage the structure when microhotplate temperature increases. Also, the bending in the arms occurs due to stress generated in the film during deposition. However, this defect was not observed in case of silicon dioxide membranes. The SEM photographs of an array and a single membrane of silicon dioxide are shown in Fig. 7(a) and Fig. 7(b) respectively. It was observed that the supporting arms of the membrane fabricated by silicon dioxide layer do not have any bending at the edge joining the silicon substrate. It was observed that the membranes were suspended over smooth cavities and also the membranes or their supporting arms were free from bending, damages and any other defects. This gives high fabrication yield of the device in case of Si02-based membrane. Since the thermal diffusivity of Si02 is smaller than the thermal diffusivity of Si3N4, therefore the Si02 film shows better performance compared to Si3N4 film at higher temperatures with same power consumption, i.e., Si02 layer is most suitable for microhotplate platforms where high temperature operation is required at low power consumption. 4. Conclusions The design, simulation and fabrication of an array of Si02 and Si3N4 dielectric membranes for microhotplate platform have been carried out. It is concluded that higher stress is generated in Si3N4 membrane as compared to Si02 membrane. The generated stress and deflection of both Si02 and Si3N4 membranes were studied at different temperatures. These results give an idea about the selection of membrane materials and thickness to get the maximum yield in fabrication of microhotplate. The simulated results were compared with experimental results. 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Mohamad, Design Simulation and Modeling of a Micromachined High Temperature Microhotplate for Application in Trace Gas Detection, IJET-IJNES, 10, 02,2010, pp. 89-96. 1 Mahanth Prasad,1,2 V. K. Khanna 1 CSIR-Central Electronics Engineering Research Institute (CEERI) Pilani-333031 (Rajasthan), India 2 Academy of Scientific & Innovative Research (AcSIR), New Delhi, India 1 E-mail: [email protected] Received: 19 February 2014 /Accepted: 30 April 2014 /Published: 31 May 2014 (c) 2014 IFSA Publishing, S.L. |