Interconnect Modeling Technical Advisory Board Announces Electromigration Rules Now Part of the Open-Source ITF Standard
(Marketwire Via Acquire Media NewsEdge) PISCATAWAY, NJ -- (Marketwired) -- 04/30/14 --
The Interconnect Modeling Technical Advisory Board (IMTAB), an IEEE-ISTO Federation Member Program, today announced the incorporation of new electromigration (EM) rule extensions to Synopsys' open-source Interconnect Technology Format (ITF), the de-facto modeling standard for integrated circuit (IC) interconnect extraction. The members, representing the broad semiconductor industry (member list available at www.imtab.org), have expanded the scope of ITF to enable both parasitic extraction for timing signoff and reliability analysis at advanced process technologies. The new EM extensions have been ratified by the IMTAB members and will be available in the upcoming open-source ITF version 2014.06.
Reliability degradation due to electromigration effects has become a significant cause for concern at advanced technology nodes such as 28nm and below. At the 16 and 14-nm nodes, the effects are amplified by the high clock frequencies achievable with FinFET devices combined with shrinking interconnect widths and increasing interconnect length, resulting in higher current densities and increasing potential for electromigration-caused failures. In this environment, efficiently conducting EM analysis to both avoid failure in the place and route stage and verify final design integrity with reliability analysis is imperative. Augmenting the open-source ITF file with EM extensions offers designers the convenience and consistency of using one technology file format across multiple implementation and verification tools.
"As a long standing member of IMTAB, ANSYS fully supports IMTAB's collaborative efforts to streamline layout parasitic extraction and electromigration analysis for the industry," says Norman Chang, Vice President and Sr. Product Strategist for the Apache subsidiary of ANSYS. "We look forward to continued participation in IMTAB and continuing to advanced interoperability through standards such as this one."
"IMTAB members are continuing to shepherd the development of ITF to address the emerging challenges in advanced node design and analysis with valuable extensions such as electromigration support," said Bari Biswas, IMTAB chair and extraction senior director of engineering at Synopsys. "During the past three years, the IMTAB has helped guide the ratification of more than 15 new additions to ITF that are helping steer the industry towards a common, proven format with significant benefits for the EDA and semiconductor industries."
Synopsys' Interconnect Technology Format (ITF) provides detailed modeling of interconnect parasitic effects that enables designers to perform accurate parasitic extraction for timing, signal integrity, power and reliability signoff analysis. ITF offers a flexible and innovative format to accurately model the effects of increased process variation at advanced process technologies. It is supported by leading semiconductor foundries, integrated device manufacturers and EDA tool providers.
ITF can be licensed for no charge through Synopsys' Technology Access Program (TAP-in(SM) program). The latest specifications for ITF can be found at: www.synopsys.com/TapIn.
Requests for ITF enhancements come from the IMTAB membership as well as from the user community. Companies interested in IMTAB membership may contact IEEE-ISTO at email@example.com.
IEEE-ISTO is the premier trusted partner of the global technology community for the development, adoption, and certification of industry standards. A federation of member programs, its mission is to facilitate the life-cycle of industry standards development through a dedicated staff committed to offering vendor neutrality, quality support and member satisfaction. IEEE-ISTO Programs span the spectrum of today's information and communications technologies. For more information, visit www.ieee-isto.org
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Source: Interconnect Modeling TAB
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