TMCnet News
Xilinx Unveils New Reference Designs [Professional Services Close - Up](Professional Services Close - Up Via Acquire Media NewsEdge) At OFC 2014, Xilinx, Inc. announced new reference designs that equip customers with single-chip solutions for 4x100G OTN Transponder and 200G OTN Switching applications. According to a release, these reference designs, in conjunction with the company's All Programmable 3D ICs and SmartCORE IP, provide customers with a fully featured evaluation platform for the creation and evolution of highly differentiated, high-bandwidth OTN applications. "Our new OTN reference designs address the low latency, high integration and performance requirements for today's multi-100G OTN applications," said Gilles Garcia, director of wired communications. "Xilinx's single-chip 400G OTN solutions are unique in the industry and our evalution platforms, combined with the new reference designs, provide designers with a critical head-start in their development process accelerating productivity and reducing time to market." The company reported that the new OTN reference designs are available for evaluation on the Xilinx Virtex-7 VC730 3D IC OTN target platform. These reference designs include a group of operating-system agnostic software APIs to simplify and accelerate the design of All Programmable Smarter Networks:-4x100G Transponder in a single Virtex-7 1140T 3D IC - reference design showcases a single-chip 400G solution. The design, a 4x100G Transponder, features a common control plane to manage the four 100G streams. Each 100G stream supports GFEC with statistics, an overhead processor to perform section, path and tandem connection monitoring and an easy to use GUI to evaluate defects and performance metrics.- 2x 100G OTN Switching on a single Virtex-7 1140T 3D IC - reference design showcases three Xilinx SmartCORE IP cores including a 100G single-Stage Multiplexer/Demultiplexer, an OIF compliant 100G Segmentation and Reassmebly (SAR) and a 100G ODUMon, a bi- directional IP block used to perform overhead insertion and extraction on up to 80 ODUj channels. These SmartCORE IP cores enable designers to construct a single chip 2x100G MuxMapSAR for Metro OTN and Packet Optical Transport systems (P-OTS). This reference design includes full section, path and six levels of tandem connection monitoring, 100GE client defects, and ODU and client signal replacement. The reference designs are now available through Xilinx local sales representative. Xilinx is a provider of All Programmable FPGAs, SoCs, and 3D ICs. Report information: www.xilinx.com/esp/wired/wired_ip_resources.htm. ((Comments on this story may be sent to [email protected])) (c) 2014 ProQuest Information and Learning Company; All Rights Reserved. |