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Avery Design Systems Offers eMMC and SD Verification IP SolutionsMay 24, 2013 (Close-Up Media via COMTEX) -- Avery Design Systems Inc., a company focusing on functional verification productivity solutions, announced availability of its eMMC and SD verification IPs. According to a release, the addition of eMMC and SD/SDIO extends Avery's portfolio of storage-related VIP, which also includes Universal Flash Storage (UFS), SCSI Express (SOP/PQI), NVM Express, USB Attached SCSI (UASP), and SATA. eMMC-Xactor supports eMMC 4.5.1 and draft 5.0 standards work by JEDEC targeting high performance embedded flash memory systems. SD-Xactor supports SD/SDIO 4.0 for high performance memory cards, systems, and IO peripherals. eMMC-Xactor and SD-Xactor are complete verification solutions enabling design and verification engineers to test the functionality of memory systems. The VIPs include: -Host and Device BFMs -Producer-consumer scoreboard -Compliance testsuite -Comprehensive protocol checks -Protocol analyzer tracker -Functional coverage model Models and compliance testsuites are developed in SystemVerilog and support UVM, OVM, and VMM environments. "Avery is focused on delivering industry leading VIP for the accelerating mobile memory revolution", says Chilai Huang, president of Avery Design Systems. "Our solution enables designers to thoroughly verify their designs functionally adhere to the latest standards and effectively pinpoint areas of non-compliance or performance bottlenecks." Avery Design Systems, Inc. enables system and SOC design teams to achieve functional verification productivity improvements through the use of formal analysis applications for automatic property and coverage generation and RT-level and gate-level X verification; core-through-chip-level Verification IP for PCI Express, USB, AMBA, UFS, MIPI, DDR/LPDDR, NVM Express, SCSI Express, eMMC, and SD/SDIO standards. More information: www.avery-design.com ((Comments on this story may be sent to [email protected])) |