[May 23, 2013] Micron Technology Assigned Patent for Methods of Making a Semiconductor Memory Device Tweet (Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service ALEXANDRIA, Va., May 23 -- Micron Technology, Boise, Idaho, has been assigned a patent (8,446,762) developed by Sanh D. Tang, Boise, Idaho, Gordon A. Haller, Boise, Idaho, and Daniel H. Doyle, Eagle, Idaho, for "methods of making a semiconductor memory device." The abstract of the patent published by the U.S. Patent and Trademark Office states: "One-transistor (1T) capacitor-less DRAM cells each include a MOS transistor having a bias gate layer that separates a floating body region from a base substrate. The MOS transistor functions as a storage device, eliminating the need of the storage capacitor. Logic "1" is written to and stored in the storage device by causing majority carriers (holes in an NMOS transistor) to accumulate and be held in the floating body region next to the bias gate layer, and is erased by removing the majority carriers from where they are held." The patent application was filed on March 25, 2011 (13/071,979). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,46,762.PN.&OS=PN/84,46,762&RS=PN/84,46,762 Written by Amal Ahmed; edited by Jaya Anand. AM0523JA0523-880460 (c) 2013 Targeted News Service [ Back To TMCnet.com's Homepage ]