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U.S. Patents Awarded to Inventors in Minnesota (May 22)(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., May 22 -- The following federal patents were awarded to inventors in Minnesota. *** International Business Machines Assigned Patent for Techniques for Processing Database Queries Including User-defined Functions ALEXANDRIA, Va., May 22 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,447,743) developed by John M. Santosuosso, Rochester, Minn., for "techniques for processing database queries including user-defined functions." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method, system and article of manufacture for query execution management in a data processing system and, more particularly, for managing execution of queries including user-defined functions. One embodiment includes an operation for managing execution of a query against data of a database. The operation includes receiving a query against the data of the database, the query having at least one query condition including a user-defined function. It is determined whether the user-defined function satisfies a predefined index applicability criterion. If the user-defined function satisfies the predefined index applicability criterion, an index over relevant data of the database is created for the user-defined function. The index is suitable for use in execution of the query against the data of the database to determine a corresponding query result." The patent application was filed on Aug. 17, 2004 (10/920,098). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,47,743.PN.&OS=PN/84,47,743&RS=PN/84,47,743 Written by Amal Ahmed; edited by Jaya Anand. *** International Business Machines Assigned Patent for Local Results Processor for Use in a Pattern Matching Accelerator ALEXANDRIA, Va., May 22 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,447,749) developed by four co-inventors for a "local results processor for use in a pattern matching accelerator." The co-inventors are Giora Biran, Zichron-Yaakov, Israel, Christoph Hagleitner, Zurich, Timothy H. Heil, Rochester, Minn., and Jan Van Lunteren, Gattikon, Switzerland. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A pattern matching accelerator (PMA) for assisting software threads to find the presence and location of strings in an input data stream that match a given pattern. The patterns are defined using regular expressions that are compiled into a data structure comprised of rules subsequently processed by the PMA. The patterns to be searched in the input stream are defined by the user as a set of regular expressions. The patterns to be searched are grouped in pattern context sets. The sets of regular expressions which define the pattern context sets are compiled to generate a rules structure used by the PMA hardware. The rules are compiled before search run time and stored in main memory, in rule cache memory within the PMA or a combination thereof. For each input character, the PMA executes the search and returns the search results." The patent application was filed on Feb. 8, 2011 (13/022,967). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,47,749.PN.&OS=PN/84,47,749&RS=PN/84,47,749 Written by Amal Ahmed; edited by Jaya Anand. *** International Business Machines Assigned Patent for Journaling Database Changes Using Minimized Journal Entries that may be Output in Human-readable Form ALEXANDRIA, Va., May 22 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,447,725) developed by Adam Thomas Stallman, Rochester, Minn., and Larry William Youngren, Rochester, Minn., for "journaling database changes using minimized journal entries that may be output in human-readable form." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A minimized journaling mechanism stores minimized journal data in a format that allows for display and outputting the journal data in human-readable form. When a change to a record occurs, instead of writing only the changed bytes, all of the bytes in each field that changed are written to the journal, along with all of the bytes in each field selected to be always journaled. A default object is created with default data in all of the fields. When the journal entry needs to be output in human-readable form, the default object is read, and the minimized journal entry is then overlaid on the default object. The result is an object that contains default data in all non-selected fields that were not changed, with the journal data in all fields and that did change and in all fields that were selected to always be journaled." The patent application was filed on June 21, 2011 (13/165,760). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,47,725.PN.&OS=PN/84,47,725&RS=PN/84,47,725 Written by Amal Ahmed; edited by Jaya Anand. *** International Business Machines Assigned Patent for Implementing Net Routing with Enhanced Correlation of Pre-buffered and Post-buffered Routes ALEXANDRIA, Va., May 22 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,448,123) developed by Paul G. Curtis, Fort Collins, Colo., and Timothy D. Helvey, Rochester, Minn., for "implementing net routing with enhanced correlation of pre-buffered and post-buffered routes." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method, system and computer program product are provided for implementing enhanced net routing with improved correlation of pre-buffered and post-buffered routes on a hierarchical design of an integrated circuit chip. In initial wiring steps the nets are routed, and then buffers are add along the net route based upon predetermined electrical parameters. Responsive to adding the buffers, distance based constraints are added to the nets. Then the nets that have been modified are rerouted." The patent application was filed on Oct. 22, 2010 (12/910,214). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,448,123&OS=8,448,123&RS=8,448,123 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** McAfee Assigned Patent for Merge Rule Wizard ALEXANDRIA, Va., May 22 -- McAfee, Santa Clara, Calif., has been assigned a patent (8,448,220) developed by Jaideep Roy, Boca Raton, Fla., Scott DeLoach, Margate, Fla., and David Diehl, Minneapolis, for a merge rule wizard. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Various embodiments include a system comprising an interface coupled to a computer network, the interface operable to provide a merge rule wizard operable to generate one or more displayable dialog boxes that include selectable criteria for merging a plurality of sets of security rules into a single security rule base." The patent application was filed on April 29, 2009 (12/432,045). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,448,220&OS=8,448,220&RS=8,448,220 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** International Business Machines Assigned Patent for Deadlock Detection in a Parallel Program ALEXANDRIA, Va., May 22 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,448,175) developed by Yang Che, Beijing, Li-Fang Lee, Rochester, Minn., and Yao Qi, Beijing, for a "deadlock detection in a parallel program." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method and system of deadlock detection in a parallel program, the method comprising: recording lock events during the operation of the parallel program and a first order relation among the lock events; converting information relevant to the operation of the parallel program into gate lock events and recording the gate lock events; establishing a second order relation among the gate lock events and lock events associated with the gate lock events and adding the second order relation to the first order relation; constructing a lock graph corresponding to the operation procedure of the parallel program based on the added first order relation; and performing deadlock detection on the constructed lock graph. The deadlock detection method of the invention can improve the accuracy of deadlock detection without depending on the deadlock detection algorithm per se, and can be applied with facility to various development environments and reduce development costs." The patent application was filed on Oct. 29, 2010 (12/915,127). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,448,175&OS=8,448,175&RS=8,448,175 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** International Business Machines Assigned Patent ALEXANDRIA, Va., May 22 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,447,891) developed by four co-inventors for a "dynamically assigning virtual functions to client applications." The co-inventors are Sean T. Brownlow, Rochester, Minn., Charles S. Graham, Rochester, Minn., Kyle A. Lucke, Oronoco, Minn., and John R. Oberly III, Rochester, Minn. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A computer-implemented method may include determining a number of virtual functions that each port of a hardware input/output adapter is capable of supporting. The computer-implemented method may include assigning a first portion of internal resources of the hardware input/output adapter to each port of the hardware input/output adapter. The computer-implemented method may also include, for a particular port of the hardware input/output adapter, assigning a second portion of the internal resources to each virtual function that the particular port is capable of supporting. The second portion of the internal resources may be a subset of the first portion of the internal resources. The computer-implemented method may further include configuring a virtual function prior to a runtime to use the assigned second portion of the internal resources." The patent application was filed on Jan. 11, 2011 (13/004,584). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,447,891&OS=8,447,891&RS=8,447,891 Written by Arpi Sharma; edited by Anand Kumar. *** International Business Machines Assigned Patent for Energy Monetary Cost Aware Query Optimization ALEXANDRIA, Va., May 22 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,447,772) developed by five co-inventors for an "energy monetary cost aware query optimization." The co-inventors are Lynnette E. Carston, Rochester, Minn., Samuel J. Miller, Rochester, Minn., Gary E. Rohret, Rochester, Minn., Jeffrey W. Tenner, Rochester, Minn., and Alwood P. Williams III, Rochester, Minn. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Embodiments of the invention provide a method of optimizing a query, including determining an execution plan for use in executing the query, based on a monetary cost of the energy needed to execute the query. A query optimization component may determine a plurality of execution plans for the query. The query optimization component may then select one of the plans to use in executing the query based on the monetary cost calculated for the plan." The patent application was filed on June 23, 2010 (12/821,453). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,447,772&OS=8,447,772&RS=8,447,772 Written by Arpi Sharma; edited by Anand Kumar. *** International Business Machines Assigned Patent for Implementing Z Directional Macro Port Assignment ALEXANDRIA, Va., May 22 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,448,121) developed by six co-inventors for an "implementing Z directional macro port assignment." The co-inventors are Matthew R. Ellavsky, Rochester, Minn., Sean T. Evans, Rochester, Minn., Timothy D. Helvey, Rochester, Minn., Phillip P. Normand, Chippewa Falls, Wis., Jason L. Van Vreede, Trempealeau, Wis., and Bradley C. White, Rochester, Minn. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method, system and computer program product are provided for implementing an enhanced Z-directional macro port assignment or three-dimensional port creation for random logic macros of heterogeneous hierarchical integrated circuit chips. An initial port placement is provided on a layer for a macro. The initial port placement is expanded to provide a three-dimensional port shape including a plurality of metal layers along a z-axis. Wire routing of each of the macro level and a chip top level is defined within the expanded three-dimensional port shape. Each unnecessary metal layer of the expanded three-dimensional port shape is removed, providing a final three-dimensional port shape." The patent application was filed on Aug. 11, 2011 (13/208,046). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,448,121&OS=8,448,121&RS=8,448,121 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** International Business Machines Assigned Patent for Estimating and Managing Energy Consumption for Query Processing ALEXANDRIA, Va., May 22 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,447,776) developed by Eric L. Barsness, Pine Island, Minn., and John M. Santosuosso, Rochester, Minn., for "estimating and managing energy consumption for query processing." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Techniques are described for estimating and managing energy consumption for query processing. Embodiments of the invention may generally receive a query to be executed and calculate an initial estimated energy consumption value for the received query. If the initial estimated energy consumption value does not exceed a threshold amount of energy, embodiments of the invention may submit the query for execution. Once execution of the query has begun, embodiments of the invention may calculate an updated estimated energy consumption value for the executing query, and if the updated value exceeds the threshold amount of energy, may halt the execution of the query." The patent application was filed on Aug. 30, 2010 (12/871,123). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,447,776&OS=8,447,776&RS=8,447,776 Written by Arpi Sharma; edited by Anand Kumar. *** International Business Machines Assigned Patent for Efficiently Applying a Single Timing Assertion to Multiple Timing Points in a Circuit Using Creating a Deffinition ALEXANDRIA, Va., May 22 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,448,113) developed by Michael D. Amundson, Oronoco, Minn., and Craig M. Darsow, Rochester, Minn., for "efficiently applying a single timing assertion to multiple timing points in a circuit using creating a deffinition." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A computer implemented method, system and/or computer program product efficiently manage timing parameters in a circuit. Multiple instances of a definition are implemented onto a circuit. A set of related pins from the multiple instances are defined, and a common assertion value is asserted against all pins in the set of related pins." The patent application was filed on April 27, 2010 (12/768,031). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,448,113&OS=8,448,113&RS=8,448,113 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Target Brands Assigned Patent ALEXANDRIA, Va., May 22 -- Target Brands, Minneapolis, has been assigned a patent (8,447,983) developed by Joshua James Beck, Minneapolis, and Daniel Mark Cundiff, Minneapolis, for a token exchange. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A value is associated with a token within a trust zone. The token is used in place of the value in operations executed within the trust zone. A key is defined for an entity outside of the trust zone. A processor encrypts the token using the key to form an encrypted token that cannot be decrypted by entities outside of the trust zone. The encrypted token is provided to the entity outside of the trust zone." The patent application was filed on Feb. 1, 2011 (13/019,128). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,447,983.PN.&OS=PN/8,447,983&RS=PN/8,447,983 Written by Kusum Sangma; edited by Anand Kumar. *** Micron Technology Assigned Patent for Stripe-based Memory Operation ALEXANDRIA, Va., May 22 -- Micron Technology, Boise, Idaho, has been assigned a patent (8,448,018) developed by Joseph M. Jeddeloh, Shoreview, Minn., for a stripe-based memory operation. The abstract of the patent published by the U.S. Patent and Trademark Office states: "The present disclosure includes methods and devices for stripe-based memory operation. One method embodiment includes writing data in a first stripe across a storage volume of a plurality of memory devices. A portion of the first stripe is updated by writing updated data in a portion of a second stripe across the storage volume of the plurality of memory devices. The portion of the first stripe is invalidated. The invalid portion of the first stripe and a remainder of the first stripe are maintained until the first stripe is reclaimed. Other methods and devices are also disclosed." The patent application was filed on Sept. 6, 2012 (13/605,124). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,448,018.PN.&OS=PN/8,448,018&RS=PN/8,448,018 Written by Kusum Sangma; edited by Anand Kumar. *** International Business Machines Assigned Patent for Recovering Failed Writes to Vital Product Data Devices ALEXANDRIA, Va., May 22 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,447,921) developed by five co-inventors for a "recovering failed writes to vital product data devices." The co-inventors are Douglas M. Boecker, Rochester, Minn., Brent W. Jacobs, Rochester, Minn., Nathan D. Miller, Rochester, Minn., Matthew S. Spinler, Rochester, Minn., and Shaun A. Wetzstein, Rochester, Minn. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for maintaining vital product data (VPD) contained in an EEPROM (Electrically Erasable Programmable Read-Only Memory) on a field replaceable unit (FRU) of a computer system that has a cache. The method includes maintaining a copy of the VPD in the cache, retrieving the copy of the VPD from the cache upon receiving a read request of the VPD, and, upon receiving a write request to write data to the VPD, writing the data to the copy of the VPD, determining whether the VPD in the EEPROM is in synchronization with the copy of the VPD in the cache, and, if the VPD and the copy of the VPD are in synchronization, writing the data to the EEPROM." The patent application was filed on Jan. 18, 2011 (13/008,047). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,447,921.PN.&OS=PN/8,447,921&RS=PN/8,447,921 Written by Kusum Sangma; edited by Anand Kumar. *** International Business Machines Assigned Patent for Paging Memory from Random Access Memory to Backing Storage in a Parallel Computer ALEXANDRIA, Va., May 22 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,447,912) developed by five co-inventors for a "paging memory from random access memory to backing storage in a parallel computer." The co-inventors are Charles J. Archer, Rochester, Minn., Michael A. Blocksome, Rochester, Minn., Todd A. Inglett, Rochester, Minn., Joseph D. Ratterman, Rochester, Minn., and Brian E. Smith, Rochester, Minn. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Paging memory from random access memory (`RAM`) to backing storage in a parallel computer that includes a plurality of compute nodes, including: executing a data processing application on a virtual machine operating system in a virtual machine on a first compute node; providing, by a second compute node, backing storage for the contents of RAM on the first compute node; and swapping, by the virtual machine operating system in the virtual machine on the first compute node, a page of memory from RAM on the first compute node to the backing storage on the second compute node." The patent application was filed on Sept. 28, 2010 (12/892,226). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,447,912.PN.&OS=PN/8,447,912&RS=PN/8,447,912 Written by Kusum Sangma; edited by Anand Kumar. *** LSI Assigned Patent for Multiprocessor System having Multiple Watchdog Timers and Method of Operation ALEXANDRIA, Va., May 22 -- LSI, Milpitas, Calif., has been assigned a patent (8,448,029) developed by James N. Snead, Eyota, Minn., for a "multiprocessor system having multiple watchdog timers and method of operation." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A multiprocessor system with multiple watchdog timers, the timers causing all the processors in the system to concurrently process a common interrupt signal asserted by any of the watchdog timers timing out. The processors, in response to the common interrupt signal, store data residing in their local memories into a memory common to all the processors. The stored data is then stored in a permanent storage device for later analysis. Thereafter, all of the processors are reset." The patent application was filed on March 11, 2009 (12/401,669). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,448,029.PN.&OS=PN/8,448,029&RS=PN/8,448,029 Written by Kusum Sangma; edited by Anand Kumar. *** International Business Machines Assigned Patent for Register Access in Distributed Virtual Bridge Environment ALEXANDRIA, Va., May 22 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,447,909) developed by Michael J. Corrigan, Rochester, Minn., David R. Engebretsen, Cannon Falls, Minn., and Bruce M. Walk, Rochester, Minn., for a "register access in distributed virtual bridge environment." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Systems and methods to perform a register access are described. A particular method includes receiving a data frame at a bridge element of a plurality of bridge elements in communication with a plurality of server computers. The data frame may include a register access request and may be forwarded from a controlling bridge in communication with the plurality of bridge elements. A register may be accessed and execution of the register access request may be initiated in response to receiving the data frame." The patent application was filed on July 19, 2010 (12/839,099). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,447,909.PN.&OS=PN/8,447,909&RS=PN/8,447,909 Written by Kusum Sangma; edited by Anand Kumar. *** International Business Machines Assigned Patent for Performing Virtual and/or Physical Resource Management for Power Management ALEXANDRIA, Va., May 22 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,448,006) developed by seven co-inventors for a "performing virtual and/or physical resource management for power management." The co-inventors are Michael S. Floyd, Cedar Park, Texas, Christopher Francois, Shakopee, Minn., Naresh Nayar, Rochester, Minn., Karthick Rajamani, Austin, Texas, Freeman L. Rawson III, Austin, Texas, Randal C. Swanberg, Round Rock, Texas, and Malcolm S. Ware, Austin, Texas. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A mechanism is provided for directed resource folding for power management. The mechanism receives a set of static platform characteristics and a set of dynamic platform characteristics for a set of resources associated with the data processing system thereby forming characteristic information. The mechanism determines whether one or more conditions have been met for each resource in the set of resources using the characteristic information. Responsive to the one or more conditions being met, the mechanism performs a resource optimization to determine at least one of a first subset of resources in the set of resources to keep active and a second subset of resources in the set of resources to dynamically fold. Based on the resource optimization, the mechanism performs either a virtual resource optimization to optimally schedule the first subset of resources or a physical resource optimization to dynamically fold the second subset of resources." The patent application was filed on Oct. 19, 2010 (12/907,190). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,448,006.PN.&OS=PN/8,448,006&RS=PN/8,448,006 Written by Kusum Sangma; edited by Anand Kumar. For more information about Targeted News Service products and services, please contact: Myron Struck, editor, Targeted News Service LLC, Springfield, Va., 703/304-1897; [email protected]; http://targetednews.com. -1125786 (c) 2013 Targeted News Service |