TMCnet News
U.S. Patents Awarded to Inventors in Oregon (May 22)(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., May 22 -- The following federal patents were awarded to inventors in Oregon. *** Terra Nova Nurseries Assigned Patent ALEXANDRIA, Va., May 22 -- Terra Nova Nurseries, Canby, Ore., has been assigned a patent (PP23,627) developed by Harini Korlipara, Canby, Ore., for an "echinacea plant named 'Secret Joy'." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A new and distinct Echinacea plant named `Secret Joy` characterized by large inflorescences with light cream colored ray florets, dark cream colored enlarged disc florets forming an anemone-type inflorescence, and good vigor." The patent application was filed on Sept. 23, 2011 (13/200,421). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=PP23,627&OS=PP23,627&RS=PP23,627 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Terra Nova Nurseries Assigned Patent for Agastache Plant Named 'Summer Sunset' ALEXANDRIA, Va., May 22 -- Terra Nova Nurseries, Canby, Ore., has been assigned a patent (PP23,623) developed by Janet N. Egger, Wilsonville, Ore., for an "agastache plant named 'Summer Sunset'." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A new and distinct form of Agastache plant characterized by orange flowers, a bushy, upright, well-branching habit, a long bloom time, and excellent vigor." The patent application was filed on Sept. 22, 2011 (13/200,486). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=PP23,623&OS=PP23,623&RS=PP23,623 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Terra Nova Nurseries Assigned Patent ALEXANDRIA, Va., May 22 -- Terra Nova Nurseries, Canby, Ore., has been assigned a patent (PP23,628) developed by Janet N. Egger, Wilsonville, Ore., for a "tiarella plant named 'Sunset Ridge'." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A new and distinct cultivar of Tiarella plant characterized by glossy leaves, large, ovate leaves with prominent dark markings along the veins and in splatters away from the veins, an excellent trailing habit, and excellent vigor." The patent application was filed on Sept. 22, 2011 (13/200,476). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=PP23,628&OS=PP23,628&RS=PP23,628 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** International Business Machines Assigned Patent for Adaptive Business Resiliency Computer System for Information Technology Environments ALEXANDRIA, Va., May 22 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,447,859) developed by four co-inventors for an "adaptive business resiliency computer system for information technology environments." The co-inventors are Mythili K. Bobak, Lagrangeville, N.Y., Chun-Shi Chang, Poughkeepsie, N.Y., Tim A. McConnell, Lexington, Ky., and Michael D. Swanson, Springfield, Ore. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Programmatically adapting an Information Technology (IT) environment to changes associated with business applications of the IT environment. The programmatically adapting is performed in the context of the business application. The changes can reflect changes in the IT environment, changes to the business application, changes to the business environment and/or failures within the environment, as examples." The patent application was filed on Dec. 28, 2007 (11/966,495). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,447,859&OS=8,447,859&RS=8,447,859 Written by Arpi Sharma; edited by Anand Kumar. *** Intel Assigned Patent ALEXANDRIA, Va., May 22 -- Intel, Santa Clara, Calif., has been assigned a patent (8,447,888) developed by 19 co-inventors for a "PCI express enhancements and extensions." The co-inventors are Jasmin Ajanovic, Portland, Ore., Mahesh Wagh, Portland, Ore., Prashant Sethi, Folsom, Calif., Debendra Das Sharma, Santa Clara, Calif., David Harriman, Portland, Ore., Mark Rosenbluth, Uxbridge, Mass., Ajay Bhatt, Portland, Ore., Peter Barry, Ardnacrusha, Ireland, Scott Dion Rodgers, Hillsboro, Ore., Anil Vasudevan, Portland, Ore., Sridhar Muthrasanallur, Puyallup, Wash., James Akiyama, Beaverton, Ore., Robert Blankenship, Tacoma, Wash., Ohad Falik, Kfar-Saba, Israel, Abraham Mendelson, Haifa, Israel, Ilan Pardo, Ramat-Hasharon, Israel, Eran Tamari, Ramat Gan, Israel, Eliezer Weissmann, Haifa, Israel, and Doron Shamia, Modiin, Israel. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses." The patent application was filed on Dec. 9, 2011 (13/316,349). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,447,888&OS=8,447,888&RS=8,447,888 Written by Arpi Sharma; edited by Anand Kumar. *** Intel Assigned Patent ALEXANDRIA, Va., May 22 -- Intel, Santa Clara, Calif., has been assigned a patent (8,448,222) developed by Uday Savagankar, Beaverton, Ore., Ravi Sahita, Beaverton, Ore., and Prashant Dewan, Hillsboro, Ore., for a "method and apparatus for registering agents onto a virtual machine monitor." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for managing an agent includes verifying an integrity of the agent in response to a registration request. Memory protection is provided for the agent dining integrity verification. An indication is generated when registration of the agent has been completed. According to one aspect of the present invention, providing memory protection includes having a virtual machine monitor limit access to the agent. Other embodiments are described and claimed." The patent application was filed on Dec. 6, 2011 (13/373,957). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,448,222&OS=8,448,222&RS=8,448,222 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** NEC Laboratories America Assigned Patent ALEXANDRIA, Va., May 22 -- NEC Laboratories America, Princeton, N.J., has been assigned a patent (8,448,145) developed by Malay K. Ganai, Plainsboro, N.J., and Sudipta Kundu, Hillsboro, Ore., for "methods and systems for reducing verification conditions for concurrent programs using mutually atomic transactions." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods and systems for generating verification conditions and verifying the correctness of a concurrent system of program threads are described. The methods and systems determine and employ mutually atomic transactions to reduce verification problem sizes and state space for concurrent systems. The embodiments provide both an adequate and an optimal set of token-passing constraints for a bounded unrolling of threads." The patent application was filed on Sept. 29, 2009 (12/569,557). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,448,145&OS=8,448,145&RS=8,448,145 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Mentor Graphics Assigned Patent ALEXANDRIA, Va., May 22 -- Mentor Graphics, Wilsonville, Ore., has been assigned a patent (8,448,008) developed by four co-inventors for a high speed clock control. The co-inventors are Friedrich Hapke, Winsen, Germany, Michael Wittke, Pinneberg, Germany, Sascha Ochsenknecht, Hamburg, Germany, and Thomas H. Rinderknecht, Tualatin, Ore. The abstract of the patent published by the U.S. Patent and Trademark Office states: "On-chip high speed clock control techniques for testing circuits with multiple clock systems are disclosed. The techniques allow certain (e.g. compatible) high speed clocks to be activated with predefined waveforms during a capture period of a logic test, based on a clock control signal. The clock control signal may be supplied via a JTAG control port or via a scan chain load port. The clock control signal may also be generated by a BIST controller. The techniques may ensure glitch-free transitions from slow speed clocks during a shift period to fast speed clocks during a capture period." The patent application was filed on March 29, 2010 (12/749,093). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,448,008.PN.&OS=PN/8,448,008&RS=PN/8,448,008 Written by Kusum Sangma; edited by Anand Kumar. *** Mentor Graphics Assigned Patent ALEXANDRIA, Va., May 22 -- Mentor Graphics, Wilsonville, Ore., has been assigned a patent (8,448,032) developed by Manish Sharma, Wilsonville, Ore., Wu-Tung Cheng, Lake Oswego, Ore., and Thomas H. Rinderknecht, Tualatin, Ore., for a "performance of signature-based diagnosis for logic BIST." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Techniques are disclosed for reducing the set of initial candidates in signature based diagnosis methodology. These techniques are based on a unique way of making optimum use of information from logic back-cone tracing along with equations that describe the test response compactor." The patent application was filed on Feb. 23, 2009 (12/918,988). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,448,032.PN.&OS=PN/8,448,032&RS=PN/8,448,032 Written by Kusum Sangma; edited by Anand Kumar. *** Intel Assigned Patent for Firmware Assisted Error Handling Scheme ALEXANDRIA, Va., May 22 -- Intel, Santa Clara, Calif., has been assigned a patent (8,448,024) developed by Mohan Kumar, Aloha, Ore., and Sarathy Jayakumar, Portland, Ore., for a "firmware assisted error handling scheme." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A firmware assisted error handling scheme in a computer system has been disclosed. In one embodiment, firmware is used to access one or more hardware-specific error registers within the computer system in response to a system management interrupt (SMI) trap. Using the firmware, an error record in a common error record format is constructed. The error record is made available to an operating system (OS) within the computer system." The patent application was filed on May 16, 2007 (11/804,105). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,448,024.PN.&OS=PN/8,448,024&RS=PN/8,448,024 Written by Kusum Sangma; edited by Anand Kumar. *** Intel Assigned Patent for Gathering and Scattering Multiple Data Elements ALEXANDRIA, Va., May 22 -- Intel, Santa Clara, Calif., has been assigned a patent (8,447,962) developed by 19 co-inventors for a "gathering and scattering multiple data elements." The co-inventors are Christopher J. Hughes, Cupertino, Calif., Yen-Kuang (Y. K.) Chen, Cupertino, Calif., Mayank Bomb, Hillsboro, Ore., Jason W. Brandt, Austin, Texas, Mark J. Buxton, Chandler, Ariz., Mark J. Charney, Lexington, Mass., Srinivas Chennupaty, Portland, Ore., Jesus Corbal, Barcelona, Spain, Martin G. Dixon, Portland, Ore., Milind B. Girkar, Sunnyvale, Calif., Jonathan C. Hall, Hillsboro, Ore., Hideki (Saito) Ido, Sunnyvale, Calif., Peter Lachner, Heroldstatt, Germany, Gilbert Neiger, Portland, Ore., Chris J. Newburn, South Beloit, Ill., Rajesh S. Parthasarathy, Hillsboro, Ore., Bret L. Toll, Hillsboro, Ore., Robert Valentine, Kiryat Tivon, Israel, and Jeffrey G. Wiedemeier, Austin, Texas. The abstract of the patent published by the U.S. Patent and Trademark Office states: "According to a first aspect, efficient data transfer operations can be achieved by: decoding by a processor device, a single instruction specifying a transfer operation for a plurality of data elements between a first storage location and a second storage location; issuing the single instruction for execution by an execution unit in the processor; detecting an occurrence of an exception during execution of the single instruction; and in response to the exception, delivering pending traps or interrupts to an exception handler prior to delivering the exception." The patent application was filed on Dec. 22, 2009 (12/644,440). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,447,962.PN.&OS=PN/8,447,962&RS=PN/8,447,962 Written by Kusum Sangma; edited by Anand Kumar. For more information about Targeted News Service products and services, please contact: Myron Struck, editor, Targeted News Service LLC, Springfield, Va., 703/304-1897; [email protected]; http://targetednews.com. -1125796 (c) 2013 Targeted News Service |