[May 18, 2013] Freescale Semiconductor Assigned Patent Tweet (Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service ALEXANDRIA, Va., May 18 -- Freescale Semiconductor, Austin, Texas, has been assigned a patent (8,440,539) developed by Mariam G. Sadaka, Austin, Texas, and Michael A. Mendicino, Austin, Texas, for an "isolation trench processing for strain control." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A semiconductor fabrication process includes forming a hard mask, e.g., silicon nitride, over an active layer of a silicon on insulator (SOI) wafer, removing a portion of the hard mask and the active layer to form a trench, and forming an isolation dielectric in the trench where the dielectric exerts compressive strain on a channel region of the active layer. Forming the dielectric may include performing a thermal oxidation. Before performing the thermal oxidation, semiconductor structures may be formed, e.g., by epitaxy, on sidewalls of the trench. The structures may be silicon or a silicon compound, e.g., silicon germanium. During the thermal oxidation, the semiconductor structures are consumed. In the case of a silicon germanium, the germanium may diffuse during the thermal oxidation to produce a silicon germanium channel region." The patent application was filed on July 31, 2007 (11/831,400). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,440,539&OS=8,440,539&RS=8,440,539 Written by Satyaban Rath; edited by Hemanta Panigrahi. SR0518HP0518-878508 (c) 2013 Targeted News Service [ Back To TMCnet.com's Homepage ]