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U.S. Patents Awarded to Inventors in North Carolina (May 10)(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., May 10 -- The following federal patents were awarded to inventors in North Carolina. *** Corning Cable Systems Assigned Patent ALEXANDRIA, Va., May 10 -- Corning Cable Systems, Hickory, N.C., has been assigned a patent (8,437,597) developed by four co-inventors for "mounting of fiber optic cable assemblies within fiber optic shelf assemblies." The co-inventors are Terry L. Cooke, Hickory, N.C., David L. Dean Jr., Hickory, N.C., Tory A. Klavuhn, Newton, N.C., and Harley J. Staber, Coppell, Texas. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Fiber optic shelf assemblies and furcation mounting structures for securing a plurality of furcation bodies of respective fiber optic cable assembles within the fiber optic shelf are disclosed. In one embodiment, the fiber optic shelf has a one-to-one correspondence between a plurality of respective modules and the respective fiber optic cable assemblies. Additionally, the fiber optic shelf assemblies and furcation mounting structures disclosed advantageously allow the mounting of a relatively large number of furcation bodies within the fiber optic shelf assembly for supporting relatively large fiber optic connections per 1 U rack space." The patent application was filed on May 11, 2011 (13/105,394). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,437,597&OS=8,437,597&RS=8,437,597 Written by Arpi Sharma; edited by Anand Kumar. *** E.I. du Pont de Nemours Assigned Patent ALEXANDRIA, Va., May 10 -- E.I. du Pont de Nemours, Wilmington, Del., has been assigned a patent (8,436,053) developed by Kenneth Wayne Leffew, Kennett Square, Pa., Ralph Birchard Lloyd, Fayetteville, N.C., and Charles Joseph Noelke, Pinehurst, N.C., for "fluorinated ionomer produced by aqueous polymerization using dispersed particulate of fluorinated ionomer." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A process for making an aqueous dispersion of fluorinated ionomer particles by providing dispersed particulate of fluorinated ionomer in an aqueous polymerization medium and polymerizing at least one fluorinated monomer having an ionic group in the aqueous polymerization medium in the presence of the dispersed particulate of fluorinated ionomer and initiator to form the aqueous dispersion of particles of fluorinated ionomer." The patent application was filed on Dec. 18, 2009 (12/641,386). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,436,053&OS=8,436,053&RS=8,436,053 Written by Neha Bharti; edited by Jaya Anand. *** E I du Pont de Nemours Assigned Patent ALEXANDRIA, Va., May 10 -- E I du Pont de Nemours, Wilmington, Del., has been assigned a patent (8,436,054) developed by four co-inventors for "fluorinated ionomer produced by aqueous polymerization using dispersed particulate of fluorinated ionomer produced in situ." The co-inventors are Ralph Munson Aten, Chadds Ford, Pa., Kenneth Wayne Leffew, Kennett Square, Pa., Ralph Birchard Lloyd, Fayetteville, N.C., and Charles Joseph Noelke, Pinehurst, N.C. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A process for making an aqueous dispersion of fluorinated ionomer particles by polymerizing in a first polymerization step at least one fluorinated monomer having an ionic group in an aqueous polymerization medium in the presence of initiator, the polymerizing providing dispersed particulate of fluorinated ionomer, polymerizing in a second polymerization step at least one fluorinated monomer having an ionic group in the aqueous polymerization medium in the presence of the dispersed particulate of fluorinated ionomer and initiator to form the aqueous dispersion of particles of fluorinated ionomer, and suspending the first polymerization step prior to beginning the second polymerization step." The patent application was filed on Dec. 18, 2009 (12/641,393). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,436,054&OS=8,436,054&RS=8,436,054 Written by Neha Bharti; edited by Jaya Anand. *** 3DMedia Assigned Patent ALEXANDRIA, Va., May 10 -- 3DMedia, Durham, N.C., has been assigned a patent (8,436,893) developed by four co-inventors for a "methods, systems, and computer-readable storage media for selecting image capture positions to generate three-dimensional (3D) images." The co-inventors are Michael McNamer, Apex, N.C., Marshall Robers, Durham, N.C., Tassos Markas, Chapel Hill, N.C., and Jason Paul Hurst, Cary, N.C. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods, systems, and computer program products for selecting image capture positions to generate three-dimensional images are disclosed herein. According to one aspect, a method includes determining a plurality of first guides associated with a first still image of a scene. The method can also include displaying a real-time image of the scene on a display. Further, the method can include determining a plurality of second guides associated with the real-time image. The method can also include displaying the first and second guides on the display for guiding selection of a position of an image capture device to capture a second still image of the scene for pairing the first and second still images as a stereoscopic pair of a three-dimensional image." The patent application was filed on July 23, 2010 (12/842,171). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,436,893&OS=8,436,893&RS=8,436,893 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Nvidia Assigned Patent for User Interface and Method for Graphical Processing Analysis ALEXANDRIA, Va., May 10 -- Nvidia, Santa Clara, Calif., has been assigned a patent (8,436,870) developed by four co-inventors for an "user interface and method for graphical processing analysis." The co-inventors are Raul Aguaviva, London, Jeffrey T. Kiel, Raleigh, N.C., Sebastien Julien Domine, San Jose, Calif., and William Orville Ramey II, Santa Clara, Calif. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A computer-implemented user interface and method for graphical processing analysis. More specifically, embodiments provide a convenient and effective mechanism for presenting GPU performance information such that one or more bottlenecking and/or underutilized graphics pipeline units may be identified. The presentation of the information enables quick comparison of all graphical operations within a frame for analysis with increased granularity. Additionally, the performance of graphical operations with common state attributes may be compared to more effectively and efficiently enhance GPU performance." The patent application was filed on Aug. 1, 2006 (11/498,207). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,436,870&OS=8,436,870&RS=8,436,870 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Chatsworth Products Assigned Patent ALEXANDRIA, Va., May 10 -- Chatsworth Products, Westlake Village, Calif., has been assigned a patent (8,437,147) developed by five co-inventors for a "kit for organizing cables in a cabinet." The co-inventors are David Lee Dean Jr., Hickory, N.C., David Brian Donowho, Austin, Texas, Richard Evans Lewis II, Austin, Texas, Karl Theodore Messmer, Keller, Texas, and Alan William Ugolini, Hickory, N.C. The abstract of the patent published by the U.S. Patent and Trademark Office states: "An equipment cabinet (2) includes an equipment rack (3) for mounting equipment (20), and includes organizational elements for organizing cables within the cabinet. The cables may be organized to reduce impeding airflow to or from the equipment, and/or to reduce unwanted bending of the cables themselves. The organizational elements may include one or more of: a trunk cable (40) including a furcation plug (45) and universal clip (47); a furcation bracket--either vertical (60) or horizontal (80); a termination panel (100); a trunk cable manager (140, 200); and/or an accessory bracket (180). The organizational elements may be used in various combinations with one another, and may be provided in a kit." The patent application was filed on May 9, 2011 (13/103,453). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,437,147&OS=8,437,147&RS=8,437,147 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Nvidia Assigned Patent for Method and User Interface for Enhanced Graphical Operation Organization ALEXANDRIA, Va., May 10 -- Nvidia, Santa Clara, Calif., has been assigned a patent (8,436,864) developed by four co-inventors for a "method and user interface for enhanced graphical operation organization." The co-inventors are Raul Aguaviva, London, Jeffrey T. Kiel, Raleigh, N.C., Sebastien Julien Domine, San Jose, Calif., and William Orville Ramey II, Santa Clara, Calif. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A computer-implemented method and user interface for organizing graphical operations and displaying performance data of a graphics processing pipeline. More specifically, embodiments provide a convenient and effective mechanism for enhancing graphics processing by automatically determining and grouping graphical operations with similar state attributes relating to one or more units of the graphics pipeline. As such, pipeline adjustments for reducing execution time of one graphical operation may benefit other graphical operations with similar state attributes, thereby reducing the number of pipeline adjustments and allowing more careful selection of graphical operations to increase performance and reduce image degradation. Also, the display of the grouped graphical operations also provides information for determining the troublesome operations. In one embodiment, the groups are ranked by their respective execution time. Additionally, other forms of performance data may be displayed for graphical operations with similar state attributes, thereby providing additional information to guide enhancement operations." The patent application was filed on Aug. 1, 2006 (11/498,229). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,436,864.PN.&OS=PN/8,436,864&RS=PN/8,436,864 Written by Kusum Sangma; edited by Anand Kumar. *** Cree Assigned Patent ALEXANDRIA, Va., May 10 -- Cree, Durham, N.C., has been assigned a patent (8,436,371) developed by Nicholas W. Medendorp Jr., Raleigh, N.C., and James Ibbetson, Santa Barbara, Calif., for a "microscale optoelectronic device packages." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An optoelectronic device article comprises a substrate containing at least one electrically conductive microvia, at least one emitter diode and at least one ESD diode, optionally formed in situ, disposed in or on the substrate, and an electrically conductive path between the foregoing elements. A reflector cavity may be defined in the substrate for receiving the emitter diode(s), with retention elements on the substrate used to retain a lens material. High flux density and high emitter diode spatial density may be attained. Thermal sensors, radiation sensors, and integral heat spreaders comprising one or more protruding fins may be integrated into the article." The patent application was filed on May 24, 2007 (11/753,483). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,436,371&OS=8,436,371&RS=8,436,371 Written by Arpi Sharma; edited by Anand Kumar. *** Massachusetts Institute of Technology Assigned Patent ALEXANDRIA, Va., May 10 -- Massachusetts Institute of Technology, Cambridge, Mass., has been assigned a patent (8,436,336) developed by Minjoo L. Lee, Durham, N.C., Christopher W. Leitz, Manchester, N.H., and Eugene A. Fitzgerald, Windham, N.H., for a "structure and method for a high-speed semiconductor device having a Ge channel layer." The abstract of the patent published by the U.S. Patent and Trademark Office states: "The invention provides semiconductor structure comprising a strained Ge channel layer, and a gate dielectric disposed over the strained Ge channel layer. In one aspect of the invention, a strained Ge channel MOSFET is provided. The strained Ge channel MOSFET includes a relaxed SiGe virtual substrate with a Ge content between 50-95%, and a strained Ge channel formed on the virtual substrate. A gate structure is formed upon the strained Ge channel, whereupon a MOSFET is formed with increased performance over bulk Si. In another embodiment of the invention, a semiconductor structure comprising a relaxed Ge channel layer and a virtual substrate, wherein the relaxed Ge channel layer is disposed above the virtual substrate. In a further aspect of the invention, a relaxed Ge channel MOSFET is provided. The method includes providing a relaxed virtual substrate with a Ge composition of approximately 100% and a relaxed Ge channel formed on the virtual substrate." The patent application was filed on Oct. 23, 2007 (11/877,186). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,436,336&OS=8,436,336&RS=8,436,336 Written by Arpi Sharma; edited by Anand Kumar. *** Cree Assigned Patent for Methods of Forming Light Emitting Devices having Current Reducing Structures ALEXANDRIA, Va., May 10 -- Cree, Durham, N.C., has been assigned a patent (8,436,368) developed by six co-inventors for "methods of forming light emitting devices having current reducing structures." The co-inventors are David Todd Emerson, Durham, N.C., Kevin Haberern, Cary, N.C., Michael John Bergmann, Chapel Hill, N.C., David B. Slater Jr., Raleigh, N.C., Matthew Donofrio, Raleigh, N.C., and John Edmond, Durham, N.C. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, and an active region between the n-type semiconductor layer and the p-type semiconductor layer. A non-transparent feature, such as a wire bond pad, is on the p-type semiconductor layer or on the n-type semiconductor layer opposite the p-type semiconductor layer, and a reduced conductivity region is in the p-type semiconductor layer or the n-type semiconductor layer and is aligned with the non-transparent feature. The reduced conductivity region may extend from a surface of the p-type semiconductor layer opposite the n-type semiconductor layer towards the active region and/or from a surface of the n-type semiconductor layer opposite the p-type semiconductor layer towards the active region." The patent application was filed on Feb. 27, 2012 (13/406,251). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,436,368&OS=8,436,368&RS=8,436,368 Written by Arpi Sharma; edited by Anand Kumar. *** Midtronics Assigned Patent ALEXANDRIA, Va., May 10 -- Midtronics, Willowbrook, Ill., has been assigned a patent (8,436,619) developed by Kevin I. Bertness, Batavia, Ill., and John S. Philbrook, Cornelius, N.C., for an "integrated tag reader and environment sensor." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A combined sensing and reading apparatus. The apparatus includes a tag reader and an environment sensor integrated with the tag reader. A battery maintenance tool that includes a tag reader and an environment sensor integrated with the tag reader is also provided. Examples of a battery maintenance tool include a battery tester and a battery charger." The patent application was filed on April 1, 2009 (12/416,453). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,436,619.PN.&OS=PN/8,436,619&RS=PN/8,436,619 Written by Kusum Sangma; edited by Anand Kumar. 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