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U.S. Patents Awarded to Inventors in Minnesota (May 8)
[May 08, 2013]

U.S. Patents Awarded to Inventors in Minnesota (May 8)


(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., May 8 -- The following federal patents were awarded to inventors in Minnesota.

*** International Business Machines Assigned Patent for System and Method for Providing Secure Access to Data with User Defined Table Functions ALEXANDRIA, Va., May 8 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,438,141) developed by Douglas R. Fish, Rochester, Minn., Hoa T. Tran, Rochester, Minn., and David A. Wall, Rochester, Minn., for a "system and method for providing secure access to data with user defined table functions." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods, systems and articles of manufacture are disclosed for providing secure access to data. Public UDTFs, private UDTFs and a metadata processor are utilized to facilitate secure access to data residing in a variety of data repositories." The patent application was filed on Jan. 27, 2005 (11/044,747). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,38,141.PN.&OS=PN/84,38,141&RS=PN/84,38,141 Written by Amal Ahmed; edited by Jaya Anand.

*** Symantec Assigned Patent ALEXANDRIA, Va., May 8 -- Symantec, Mountain View, Calif., has been assigned a patent (8,438,136) developed by James P. Ohr, Saint Paul, Minn., and Timothy J. Stevens, Andover, Minn., for a "backup catalog recovery from replicated data." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method, system, and computer-readable storage medium are disclosed for recovering a backup catalog from replicated data. A set of catalog metadata may be stored in a metadata object on a first storage device. The set of catalog metadata may describe a plurality of files stored in an archive. The metadata object and the archive may be copied to a second storage device, thereby generating a replicated metadata object and a replicated archive on the second storage device. The set of catalog metadata may be imported from the replicated metadata object into a destination backup catalog. The destination backup catalog describes the plurality of files stored in the replicated archive." The patent application was filed on Sept. 27, 2007 (11/862,901). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,38,136.PN.&OS=PN/84,38,136&RS=PN/84,38,136 Written by Amal Ahmed; edited by Jaya Anand.

*** International Business Machines Assigned Patent for Autonomically Regulating Information Transfer when Accessing Database Resources ALEXANDRIA, Va., May 8 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,438,161) developed by William T. Newport, Rochester, Minn., John Joseph Stecher, Rochester, Minn., and Robert Wisniewski, Rochester, Minn., for an "autonomically regulating information transfer when accessing database resources." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A database access facility for accessing databases includes a monitoring function which monitors accesses by requestors of database data. The monitoring function tracks which database fields are requested to dynamically determine the fields which the application needs. Once sufficient tracking data is obtained, subsequent accesses to the database on behalf of an application are automatically modified by the application server to request only the fields which are likely to be needed. Preferably, the database access facility is an application server for one or middle tier applications which access the database on behalf of multiple clients in a three-tier client-server environment." The patent application was filed on March 19, 2012 (13/423,544). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,38,161.PN.&OS=PN/84,38,161&RS=PN/84,38,161 Written by Amal Ahmed; edited by Jaya Anand.


*** Lockheed Martin Assigned Patent ALEXANDRIA, Va., May 8 -- Lockheed Martin, Bethesda, Md., has been assigned a patent (8,438,209) developed by Rick C. Stevens, Apple Valley, Minn., for an "optical adder with optical carry." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An analog optical adder system that achieves high precision results. The system uses an analog optical carry function to provide a result having a precision higher than the precision of the individual elements of the system. The optical carry function is created by optical carry determinators that are configured to add an optical carry, if any, to an optical signal associated with a next adjacent byte of the digital signals being added. The use of optical carry enables greater overall addition precision." The patent application was filed on June 9, 2009 (12/481,223). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,38,209.PN.&OS=PN/84,38,209&RS=PN/84,38,209 Written by Amal Ahmed; edited by Jaya Anand.

*** International Business Machines Assigned Patent for Thread Speculative Execution and Asynchronous Conflict ALEXANDRIA, Va., May 8 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,438,571) developed by four co-inventors for a "thread speculative execution and asynchronous conflict." The co-inventors are Thomas M. Gooding, Rochester, Minn., John Kevin O'Brien, South Salem, N.Y., Kai-Ting Amy Wang, Ontario, Canada, and Xiaotong Zhuang, White Plains, N.Y.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "In an embodiment, asynchronous conflict events are received during a previous rollback period. Each of the asynchronous conflict events represent conflicts encountered by speculative execution of a first plurality of work units and may be received out-of-order. During a current rollback period, a first work unit is determined whose speculative execution raised one of the asynchronous conflict events, and the first work unit is older than all other of the first plurality of work units. A second plurality of work units are determined, whose ages are equal to or older than the first work unit, wherein each of the second plurality of work units are assigned to respective executing threads. Rollbacks of the second plurality of work units are performed. After the rollbacks of the second plurality of work units are performed, speculative executions of the second plurality of work units are initiated in age order, from oldest to youngest." The patent application was filed on Feb. 24, 2010 (12/711,328). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,438,571&OS=8,438,571&RS=8,438,571 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Clock Alias for Timing Analysis of an Integrated Circuit Design ALEXANDRIA, Va., May 8 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,438,514) developed by Michael D. Amundson, Oronoco, Minn., and Craig M. Darsow, Rochester, Minn., for a "clock alias for timing analysis of an integrated circuit design." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A timing analysis mechanism allows defining a clock alias that correlates a clock that is not present in an integrated circuit design to a real clock in the integrated circuit design. In a first implementation, when an existing user assertion references a clock alias, the timing analysis mechanism generates a new user assertion that references the real clock specified in the clock alias. The new user assertion is then used in the timing analysis and the existing user assertion is not. In a second implementation, when an existing user assertion references a clock alias, the timing analysis mechanism generates a duplicate clock in the timing database, preserving all its attributes, and then passes the assertion using the alias name as well as any assertions using the corresponding real clock name to the timing engine to be used in the timing analysis." The patent application was filed on April 17, 2012 (13/449,139). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,438,514.PN.&OS=PN/8,438,514&RS=PN/8,438,514 Written by Kusum Sangma; edited by Anand Kumar.

*** International Business Machines Assigned Patent for Network on Chip with an I/O Accelerator ALEXANDRIA, Va., May 8 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,438,578) developed by Russell D. Hoover, Rochester, Minn., Jon K. Kriegel, Rochester, Minn., and Eric O. Mejdrich, Rochester, Minn., for a "network on chip with an I/O accelerator." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Data processing on a network on chip (`NOC`) that includes IP blocks, routers, memory communications controllers, and network interface controllers; each IP block adapted to a router through a memory communications controller and a network interface controller; each memory communications controller controlling communication between an IP block and memory; each network interface controller controlling inter-IP block communications through routers; each IP block adapted to the network by a low latency, high bandwidth application messaging interconnect comprising an inbox and an outbox; a computer software application segmented into stages, each stage comprising a flexibly configurable module of computer program instructions identified by a stage ID with each stage executing on a thread of execution on an IP block; and at least one of the IP blocks comprising an input/output (`I/O`) accelerator that administers at least some data communications traffic to and from the at least one IP block." The patent application was filed on June 9, 2008 (12/135,364). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,438,578&OS=8,438,578&RS=8,438,578 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Managing Assignment of Partition Services to Virtual Input/output Adapters ALEXANDRIA, Va., May 8 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,438,566) developed by four co-inventors for a "managing assignment of partition services to virtual input/output adapters." The co-inventors are Bryan M. Logan, Rochester, Minn., Kyle A. Lucke, Oronoco, Minn., Amartey S. Pearson, Austin, Texas, and Steven E. Royer, Rochester, Minn.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Automated management of partition service assignment to a virtual input/output (VIO) adapter is provided. Responsive to creation of a new partition service in a data processing system, a partition priority number is determined for the new partition service, and, for each VIO adapter, the partition priority numbers of the partition services currently assigned to that VIO adapter are summed. For a VIO adapter with a lowest sum of partition priority numbers, logic determines whether assigning the new partition service to that VIO adapter results in its summed partition priority number being above a predefined threshold, and the new partition service is assigned to a VIO adapter based, at least in part, on whether assigning the new partition service to the VIO adapter with the lowest sum of partition priority numbers results in that VIO adapter's summed partition priority number exceeding the predefined threshold." The patent application was filed on April 16, 2012 (13/447,393). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,438,566&OS=8,438,566&RS=8,438,566 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Speculative Thread Execution with Hardware Transactional Memory ALEXANDRIA, Va., May 8 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,438,568) developed by six co-inventors for a "speculative thread execution with hardware transactional memory." The co-inventors are Mark E. Giampapa, Irvington, N.Y., Thomas M. Gooding, Rochester, Minn., Raul E. Silvera, Ontario, Canada, Kai-Ting Amy Wang, Ontario, Canada, Peng Wu, Rochester, N.Y., and Xiaotong Zhuang, White Plains, N.Y.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "In an embodiment, if a self thread has more than one conflict, a transaction of the self thread is aborted and restarted. If the self thread has only one conflict and an enemy thread of the self thread has more than one conflict, the transaction of the self thread is committed. If the self thread only conflicts with the enemy thread and the enemy thread only conflicts with the self thread and the self thread has a key that has a higher priority than a key of the enemy thread, the transaction of the self thread is committed. If the self thread only conflicts with the enemy thread, the enemy thread only conflicts with the self thread, and the self thread has a key that has a lower priority than the key of the enemy thread, the transaction of the self thread is aborted." The patent application was filed on Feb. 24, 2010 (12/711,352). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,438,568&OS=8,438,568&RS=8,438,568 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** LSI Assigned Patent ALEXANDRIA, Va., May 8 -- LSI, Milpitas, Calif., has been assigned a patent (8,438,641) developed by four co-inventors for a "security protocol processing for anti-replay protection." The co-inventors are Vojislav Vukovic, Campbell, Calif., Brian Vanderwarn, Maple Grove, Minn., Nikola Radovanovic, Los Altos, Calif., and Ephrem Wu, San Mateo, Calif.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Described embodiments provide a network processor that includes a security protocol processor to prevent replay attacks on the network processor. A memory stores security associations for anti-replay operations. A pre-fetch module retrieves an anti-replay window corresponding to a data stream of the network processor. The anti-replay window has a range of sequence numbers. When the network processor receives a data packet, the security hardware accelerator determines a value of the received sequence number with respect to minimum and maximum values of a sequence number range of the anti-replay window. Depending on the value, the data packet is either received or accepted. The anti-replay window might be updated to reflect the receipt of the most recent data packet." The patent application was filed on Dec. 29, 2010 (12/980,489). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,438,641&OS=8,438,641&RS=8,438,641 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Symantec Assigned Patent ALEXANDRIA, Va., May 8 -- Symantec, Mountain View, Calif., has been assigned a patent (8,438,630) developed by Thomas G. Clifford, Edina, Minn., for a "data loss prevention system employing encryption detection." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method is disclosed for implementing a data loss prevention (DLP) system capable of detecting transmission attempts involving encrypted data. In response to detecting that the data is encrypted, such a DLP system may perform any number of configurable DLP actions, such as blocking the data transmission attempt and/or sequestering the data. The DLP system may determine that the data is encrypted, based at least in part, on a value of a compressibility measure of the data, such as a compression ratio. The DLP system may leverage other operating system and/or file system capabilities, such as file extensions, magic numbers, or other utilities. The DLP system may determine if the data is compressed rather than encrypted by attempting to decompress the file." The patent application was filed on March 30, 2009 (12/413,821). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,438,630&OS=8,438,630&RS=8,438,630 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Resource Allocator with Knowledge-based Optimization ALEXANDRIA, Va., May 8 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,438,570) developed by Rashed Ferdous, Rochester, Minn., Arthur J. Meyer III, Oronoco, Minn., and Carlos P. Sosa, Eagan, Minn., for a "resource allocator with knowledge-based optimization." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An automated resource allocation technique for scheduling a batch computer job in a multi-computer system environment. According to example embodiments, resource allocation processing may be performed when receiving a batch computer job that needs to be run by a software application executable on more than one computing system in the multi-computer system environment. The job may be submitted for pre-processing analysis by the software application. A pre-processing analysis result comprising job evaluation information may be received from the software application and the result may be evaluated to select a computing system in the multi-computer system environment that is capable of executing the application to run the job. The job may be submitted to the selected computing system to have the software application run the job to completion." The patent application was filed on July 31, 2010 (12/848,126). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,438,570&OS=8,438,570&RS=8,438,570 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Indigo Identityware Assigned Patent ALEXANDRIA, Va., May 8 -- Indigo Identityware, Edina, Minn., has been assigned a patent (8,438,400) developed by Robert John Hoghaug, Prior Lake, Minn., and Thomas Andrew Hoghaug, Chanhassen, Minn., for a "multiple user desktop graphical identification and authentication." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A multiple user desktop graphical identification and authentication configured as a loadable dynamic link library (DLL) intended to replace the default Microsoft graphical identification and authentication. It has the ability to create secure, private logon sessions for each user that logs on to the system. There can be up to at least thirteen users logged in at the same time and each user will have their own desktop environment. Auto log off functions may be set based on time of inactivity and/or number of individual users. The multiple user desktop graphical identification and authentication functions in a domain and non-networked environments and needs no added hardware." The patent application was filed on Jan. 10, 2006 (11/329,216). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,438,400.PN.&OS=PN/8,438,400&RS=PN/8,438,400 Written by Kusum Sangma; edited by Anand Kumar.

*** Symantec Assigned Patent for Proxy Backup of Virtual Disk Image Files on NAS Devices ALEXANDRIA, Va., May 8 -- Symantec, Mountain View, Calif., has been assigned a patent (8,438,349) developed by five co-inventors for a "proxy backup of virtual disk image files on NAS devices." The co-inventors are James Robert Olson, Afton, Minn., Timothy M. Naftel, Longmont, Colo., David Teater, Minneapolis, Sinh D. Nguyen, Eden Prairie, Minn., and James P. Ohr, St. Paul, Minn.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method for backing up a virtual machine executing on a virtualization server computer are described. A snapshot of a virtual disk image file of the virtual machine may be created on a network-attached storage (NAS) device coupled to the virtualization server computer. The snapshot may be used to backup the virtual disk image file from the NAS device to a backup storage device without transferring the virtual disk image file through the virtualization server computer. Mapping information useable to access the plurality of files stored in the virtual disk image file on an individual basis may be created and stored together with the backup copy of the virtual disk image file on the backup storage device." The patent application was filed on Aug. 21, 2009 (12/545,450). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,438,349&OS=8,438,349&RS=8,438,349 Written by Arpi Sharma; edited by Anand Kumar.

*** Seagate Technology Assigned Patent ALEXANDRIA, Va., May 8 -- Seagate Technology, Cupertino, Calif., has been assigned a patent (8,438,361) developed by Ryan J. Goss, Lakeville, Minn., Kevin Gomez, Eden Prairie, Minn., and Mark Allen Gaertner, Vadnais Heights, Minn., for a "logical block storage in a storage device." The abstract of the patent published by the U.S. Patent and Trademark Office states: "In general, this disclosure relates to storage of logical blocks in a storage device. Aspects of this disclosure describe techniques to monitor the frequency of access of one or more logical blocks referenced by one or more logical block addresses. Based on the frequency of access, in non-limiting aspects of this disclosure, a controller may select one or more physical blocks of a common memory storage block. The storage device may store the logical blocks in the selected physical blocks." The patent application was filed on March 10, 2010 (12/721,490). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,438,361&OS=8,438,361&RS=8,438,361 Written by Arpi Sharma; edited by Anand Kumar.

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