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U.S. Patents Awarded to Inventors in Oregon (May 2)(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., May 2 -- The following federal patents were awarded to inventors in Oregon. *** Intel Assigned Patent for Memory Cell Using BTI Effects in High-k Metal Gate MOS ALEXANDRIA, Va., May 2 -- Intel, Santa Clara, Calif., has been assigned a patent (8,432,751) developed by Walid M. Hafez, Portland, Ore., Anisur Rahman, Hillsboro, Ore., and Chia-Hong Jan, Portland, Ore., for a "memory cell using BTI effects in high-k metal gate MOS." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Techniques and circuitry are disclosed for implementing non-volatile storage that exploit bias temperature instability (BTI) effects of high-k/metal-gate n-type or p-type metal oxide semiconductor (NMOS or PMOS) transistors. A programmed bitcell of, for example, a memory or programmable logic circuit exhibits a threshold voltage shift resulting from an applied programming bias used to program bitcells. In some cases, applying a first programming bias causes the device to have a first state, and applying a second programming bias causes the device to have a second state that is different than the first state. Programmed bitcells can be erased by applying an opposite polarity stress, and re-programmed through multiple cycles. The bitcell configuration can be used in conjunction with column/row select circuitry and/or readout circuitry, in accordance with some embodiments." The patent application was filed on Dec. 22, 2010 (12/976,630). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,32,751.PN.&OS=PN/84,32,751&RS=PN/84,32,751 Written by Amal Ahmed; edited by Jaya Anand. *** Hewlett-Packard Development Assigned Patent for Transmitting Video Streams ALEXANDRIA, Va., May 2 -- Hewlett-Packard Development, Houston, has been assigned a patent (8,432,804) developed by Arnold W. Larson, Corvallis, Ore., for transmitting video streams. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Systems, methods, and devices for transmitting video streams are described herein. One method of transmitting video streams includes coordinating transmission of intra-frames in a first video stream with transmission of intra-frames in a second video stream. The method further includes transmitting I-frames in the first and second video streams such that the I-frames do not overlap in the first and second video streams." The patent application was filed on Sept. 3, 2008 (12/203,683). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,32,804.PN.&OS=PN/84,32,804&RS=PN/84,32,804 Written by Amal Ahmed; edited by Jaya Anand. *** Citrix Systems Assigned Patent ALEXANDRIA, Va., May 2 -- Citrix Systems, Fort Lauderdale, Fla., has been assigned a patent (8,432,800) developed by Robert Plamondon, Blodgett, Ore., Michael Ovsiannikov, San Mateo, Calif., and Allen Samuels, San Jose, Calif., for "systems and methods for stochastic-based quality of service." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Systems and methods for utilizing transaction boundary detection methods in queuing and retransmission decisions relating to network traffic are described. By detecting transaction boundaries and sizes, a client, server, or intermediary device may prioritize based on transaction sizes in queuing decisions, giving precedence to smaller transactions which may represent interactive and/or latency-sensitive traffic. Further, after detecting a transaction boundary, a device may retransmit one or more additional packets prompting acknowledgements, in order to ensure timely notification if the last packet of the transaction has been dropped. Systems and methods for potentially improving network latency, including retransmitting a dropped packet twice or more in order to avoid incurring additional delays due to a retransmitted packet being lost are also described." The patent application was filed on March 12, 2007 (11/685,156). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,32,800.PN.&OS=PN/84,32,800&RS=PN/84,32,800 Written by Amal Ahmed; edited by Jaya Anand. *** Intel Assigned Patent for Dynamic Reassignment for I/O Transfers Using a Completion Queue ALEXANDRIA, Va., May 2 -- Intel, Santa Clara, Calif., has been assigned a patent (8,433,833) developed by Jisoo Yang, Beaverton, Ore., and Dave B. Minturn, Hillsboro, Ore., for a "dynamic reassignment for I/O transfers using a completion queue." The abstract of the patent published by the U.S. Patent and Trademark Office states: "In some embodiments of the present invention, host systems and/or devices are made to be capable of employing asynchronous or synchronous modes. For example, for storage devices capable of finishing I/O requests in a sufficiently small amount of time, e.g., a few microseconds, host system software may perform the storage I/O request synchronously by polling for a completion." The patent application was filed on March 30, 2011 (13/075,959). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,433,833&OS=8,433,833&RS=8,433,833 Written by Arpi Sharma; edited by Anand Kumar. *** Intel Assigned Patent ALEXANDRIA, Va., May 2 -- Intel, Santa Clara, Calif., has been assigned a patent (8,433,850) developed by seven co-inventors for a "method and apparatus for pipeline inclusion and instruction restarts in a micro-op cache of a processor." The co-inventors are Lihu Rappoport, Haifa, Israel, Chen Koren, Haifa, Israel, Franck Sala, Haifa, Israel, Ilhyun Kim, Beaverton, Ore., Lior Libis, Haifa, Israel, Ron Gabor, Raanana, Israel, and Oded Lempel, Moshav Amikam, Israel. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods and apparatus for instruction restarts and inclusion in processor micro-op caches are disclosed. Embodiments of micro-op caches have way storage fields to record the instruction-cache ways storing corresponding macroinstructions. Instruction-cache in-use indications associated with the instruction-cache lines storing the instructions are updated upon micro-op cache hits. In-use indications can be located using the recorded instruction-cache ways in micro-op cache lines. Victim-cache deallocation micro-ops are enqueued in a micro-op queue after micro-op cache miss synchronizations, responsive to evictions from the instruction-cache into a victim-cache. Inclusion logic also locates and evicts micro-op cache lines corresponding to the recorded instruction-cache ways, responsive to evictions from the instruction-cache." The patent application was filed on Dec. 2, 2008 (12/326,885). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,433,850&OS=8,433,850&RS=8,433,850 Written by Arpi Sharma; edited by Anand Kumar. *** Intel Assigned Patent for Providing a Peripheral Component Interconnect (PCI)-compatible Transaction Level Protocol for a System on a Chip (SoC) ALEXANDRIA, Va., May 2 -- Intel, Santa Clara, Calif., has been assigned a patent (8,433,841) developed by six co-inventors for "providing a peripheral component interconnect (PCI)-compatible transaction level protocol for a system on a chip (SoC)." The co-inventors are Ken Shoemaker, Los Altos Hills, Calif., Mahesh Wagh, Portland, Ore., Woojong Han, Phoenix, Madhu Athreya, Saratoga, Calif., Arvind Mandhani, San Francisco, and Shreekant S. Thakkar, Portland, Ore. The abstract of the patent published by the U.S. Patent and Trademark Office states: "In one embodiment, the present invention includes an apparatus having an adapter to communicate according to a personal computer (PC) protocol and a second protocol. A first interface coupled to the adapter is to perform address translation and ordering of transactions received from upstream of the adapter. The first interface is coupled in turn via one or more physical units to heterogeneous resources, each of which includes an intellectual property (IP) core and a shim, where the shim is to implement a header of the PC protocol for the IP core to enable its incorporation into the apparatus without modification. Other embodiments are described and claimed." The patent application was filed on May 30, 2012 (13/483,237). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,433,841&OS=8,433,841&RS=8,433,841 Written by Arpi Sharma; edited by Anand Kumar. *** Digimarc Assigned Patent ALEXANDRIA, Va., May 2 -- Digimarc, Beaverton, Ore., has been assigned a patent (8,433,306) developed by Tony F. Rodriguez, Portland, Ore., for a "second screens and widgets." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Cell phones and other devices are used to complement enjoyment of television or other video media, through use of corresponding software applications ("widgets"). A great variety of related features and arrangements are particularly detailed." The patent application was filed on Jan. 28, 2010 (12/695,903). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,433,306.PN.&OS=PN/8,433,306&RS=PN/8,433,306 Written by Kusum Sangma; edited by Anand Kumar. *** Intel Assigned Patent for Dynamic RFI Detection Using Signal Strength Values ALEXANDRIA, Va., May 2 -- Intel, Santa Clara, Calif., has been assigned a patent (8,433,248) developed by Chaitanya Sreerama, Hillsboro, Ore., and Harry G. Skinner, Beaverton, Ore., for a "dynamic RFI detection using signal strength values." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An apparatus may include a radio interface to receive a plurality of signal strength values of a radio. An interference module can identify a radio frequency interference impact on the radio based on the plurality of signal strength values. In one embodiment, the radio interface issues a plurality of interference calls to the radio, where each of the plurality of signal strength values corresponds to an interference call." The patent application was filed on June 8, 2009 (12/480,092). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,433,248.PN.&OS=PN/8,433,248&RS=PN/8,433,248 Written by Kusum Sangma; edited by Anand Kumar. For more information about Targeted News Service products and services, please contact: Myron Struck, editor, Targeted News Service LLC, Springfield, Va., 703/304-1897; [email protected]; http://targetednews.com. -1123569 (c) 2013 Targeted News Service |