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U.S. Patents Awarded to Inventors in Texas (April 24)
[April 24, 2013]

U.S. Patents Awarded to Inventors in Texas (April 24)


(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., April 24 -- The following federal patents were awarded to inventors in Texas.

*** International Business Machines Assigned Patent ALEXANDRIA, Va., April 24 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,429,213) developed by Ashutosh Goyal, Austin, Texas, for a "method of forcing 1's and inverting sum in an adder without incurring timing delay." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A summing circuit for an adder decodes control signals to determine that the result should be manipulated, and generates a half-sum output which is used to produce a manipulated result based on the control signals. The half-sum output is combined with a previous carry bit to complete the sum operation. The control signals can invert the adder result, or force the result to be all 1's. These functions can be effectuated in a 3-way multiplexer that combines the operand inputs and control signals. For inversion, two separate logic circuits produce true and complement half-sums in parallel, and the appropriate half-sum is selected for the half-sum output. For a result of all 1's, a force_1 control signal pulls the half-sum output node to electrical ground and the final output is manipulated by gating the carry signals with the force_1 signal. The two functions are implemented without introducing additional delay." The patent application was filed on Jan. 26, 2009 (12/360,106). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,29,213.PN.&OS=PN/84,29,213&RS=PN/84,29,213 Written by Amal Ahmed; edited by Jaya Anand.

*** International Business Machines Assigned Patent for System and Method for Supporting a Plurality of Access Control List Types for a File System in an Operating System ALEXANDRIA, Va., April 24 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,429,192) developed by six co-inventors for a "system and method for supporting a plurality of access control list types for a file system in an operating system." The co-inventors are Rodney Carlton Burnett, Austin, Texas, Ramanjaneya Sarma Burugula, Croton on Hudson, N.Y., Niteesh K. Dubey, Yorktown Heights, N.Y., Joefon Jann, Ossining, N.Y., Ravi A. Shankar, Austin, Texas, and Wu Zheng, Austin, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "System, method and computer program product for supporting a plurality of Access Control List types for a file system in an operating system in a data processing system. An Access Control List supporting system for managing access to a file system in a data processing system has at least one file system in an operating system of the data processing system, and an Access Control List management framework in the operating system and external to the at least one file system for managing access to the at least one file system. The Access Control List supporting system of the invention removes ACL management and access check-related functions from the at least one file system to an external Access Control List management framework, thus enabling an operating system to support a plurality of Access Control List types using the same Access Control List management framework and enabling new Access Control List types to be added to the operating system dynamically while the operating system is running." The patent application was filed on Dec. 2, 2004 (11/002,865). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,29,192.PN.&OS=PN/84,29,192&RS=PN/84,29,192 Written by Amal Ahmed; edited by Jaya Anand.


*** International Business Machines Assigned Patent for Domain Based Isolation of Objects ALEXANDRIA, Va., April 24 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,429,191) developed by five co-inventors for a "domain based isolation of objects." The co-inventors are Saurabh Desai, Austin, Texas, George Mathew Koikara, Bangalore, India, Pruthvi Panyam Nataraj, Bangalore, India, Guha Prasad Venkataraman, Chennai, India, and Vidya Ranganathan, Bangalore, India.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Functionality can be implemented in an operating system to increase the granularity of isolation for objects. A domain can be defined to represent each of different entities (e.g., different departments or work groups). User identifiers and/or user credentials can be associated with the appropriate domain or domains. An administrator can then define a set of rules that govern operation(s) that can be performed on the objects based on the domains. Processes running on a system will inherit the domains of a user account logged into the system. When a process running on the system attempts to perform an operation on an object, an operating system process evaluates the domain isolation rules with an identifier of the object and a domain identifier to determine whether the operation is permitted to proceed." The patent application was filed on Jan. 14, 2011 (13/006,621). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,29,191.PN.&OS=PN/84,29,191&RS=PN/84,29,191 Written by Amal Ahmed; edited by Jaya Anand.

*** AT&T Intellectual Property I Assigned Patent ALEXANDRIA, Va., April 24 -- AT&T Intellectual Property I, Atlanta, has been assigned a patent (8,429,119) developed by four co-inventors for a "system and method of determining relationship information." The co-inventors are Sreenivasa Gorti, Austin, Texas, Robert Dailey, Austin, Texas, Ankur Mukerji, Austin, Texas, and Scott Thomas, Austin, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method includes classifying a relationship between a first party and each of one or more additional parties based on at least one of a number of communications between the first party and each of the one or more additional parties over a time period and a frequency of the communications between the first party and each of the one or more additional parties over the time period. The method includes generating first social network data based on the relationship between the first party and each of the one or more additional parties." The patent application was filed on April 10, 2012 (13/443,080). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,29,119.PN.&OS=PN/84,29,119&RS=PN/84,29,119 Written by Amal Ahmed; edited by Jaya Anand.

*** University of Texas System Assigned Patent ALEXANDRIA, Va., April 24 -- The University of Texas System, Austin, Texas, has been assigned a patent (8,429,179) developed by Parsa Mirhaji, Pearland, Texas, for a "method and system for ontology driven data collection and processing." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Systems and method to aid in the collection, representation and mining of data are disclosed. More particularly, embodiments as disclosed may utilize a unifying format to represent data obtained or utilized by a system to facilitate linking between data from different sources and the commensurate ability to mine such data. Specifically, embodiments may represent data as graphs that comprise the concepts and relationships between those concepts. In this manner, concepts in graphs that represent distinct groupings of data may be mapped and knowledge mining with respect to these graphs facilitated." The patent application was filed on Dec. 13, 2010 (12/928,463). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,29,179.PN.&OS=PN/84,29,179&RS=PN/84,29,179 Written by Amal Ahmed; edited by Jaya Anand.

*** United Services Automobile Association (USAA) Assigned Patent ALEXANDRIA, Va., April 24 -- United Services Automobile Association (USAA), San Antonio, has been assigned a patent (8,429,045) developed by Steven Dale Zettner, San Antonio, for a "system and method to provide an email account." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Disclosed are systems and methods to provide an email account. The systems and methods provide techniques wherein an email account is provided by a provider to a member, the system having at least one subsystem to provide a financial account for the member, provide an email account to the member, and integrate the financial account and the email account on an Internet site, thereby allowing the member to have access to the email account and the financial account on the Internet site." The patent application was filed on July 31, 2007 (11/831,044). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,429,045&OS=8,429,045&RS=8,429,045 Written by Neha Bharti; edited by Jaya Anand.

*** Apple Assigned Patent for Method for Preparing for and Formally Verifying a Modified Integrated Circuit Design ALEXANDRIA, Va., April 24 -- Apple, Cupertino, Calif., has been assigned a patent (8,429,580) developed by Raymond C. Yeung, Round Rock, Texas, Irfan Waheed, Austin, Texas, and Mark H. Nodine, Austin, Texas, for a "method for preparing for and formally verifying a modified integrated circuit design." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for preparing an IC design that has been modified to be formally verified with a reference IC design. Because some formal verification tools cannot handle the complexity often associated with sequential equivalence checking at the top level of a circuit, the modified IC design may be instantiated into a number of different design versions, each having different levels of modification complexity. In addition, the reference IC design and the modified versions may be decomposed into a datapath and control path. The reference IC design and each of the modified IC design versions may also use wrappers to encapsulate various levels of hierarchy of the logic. Lastly, rather than having to verify each of the modified versions back to the reference IC design, the equivalence checking may be performed between each modified IC design version and a next modified IC design version having a greater modification computational complexity." The patent application was filed on Aug. 19, 2011 (13/213,415). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,429,580&OS=8,429,580&RS=8,429,580 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Pervasive Software Assigned Patent ALEXANDRIA, Va., April 24 -- Pervasive Software, Austin, Texas, has been assigned a patent (8,429,631) developed by four co-inventors for a "system and method for data transformation using dataflow graphs." The co-inventors are Larry Lee Schumacher, Austin, Texas, Agustin Gonzales-Tuchmann, Austin, Texas, Laurence Tobin Yogman, Austin, Texas, and Paul C. Dingman, Leander, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method for managing data, such as in a data warehousing, analysis, or similar applications, where dataflow graphs are expressed as reusable map components, at least some of which are selected from a library of components, and map components are assembled to create an integrated dataflow application. Composite map components encapsulate a dataflow pattern using other maps as subcomponents. Ports are used as link points to assemble map components and are hierarchical and composite allowing ports to contain other ports. The dataflow application may be executed in a parallel processing environment by recognizing the linked data processes within the map components and assigning threads to the linked data processes." The patent application was filed on Sept. 14, 2010 (12/881,504). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,429,631&OS=8,429,631&RS=8,429,631 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Texas Instruments Assigned Patent ALEXANDRIA, Va., April 24 -- Texas Instruments, Dallas, has been assigned a patent (8,429,592) developed by four co-inventors for a "N/P configurable LDMOS subcircuit macro model." The co-inventors are Yong Liu, Murphy, Texas, Keith R. Green, Prosper, Texas, Marie Denison, Plano, Texas, and Yizhong Xie, Frisco, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A process of operating a computer system to create a subcircuit model of an N/P configurable extended drain MOS transistor in which the subcircuit model includes an npn bipolar transistor and a pnp bipolar transistor which correspond to current paths through n-channel drift lanes and p-channel drift lanes during dual mode operation. A process of operating a computer system to simulate the behavior of an electronic circuit including a N/P configurable extended drain MOS transistor in which a subcircuit model of the N/P configurable extended drain MOS transistor includes an npn bipolar transistor and a pnp bipolar transistor which correspond to current paths through n-channel drift lanes and p-channel drift lanes during dual mode operation. A computer readable medium storing an electronic circuit simulation program that generates a simulation output of the behavior of an electronic circuit including a N/P configurable extended drain MOS transistor. " The patent application was filed on Oct. 20, 2011 (13/277,932). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,429,592&OS=8,429,592&RS=8,429,592 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Component Lock Tracing by Associating Component Type Parameters with Particular Lock Instances ALEXANDRIA, Va., April 24 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,429,621) developed by Juan M Casas, Round Rock, Texas, Saurabh Nath Sharma, Austin, Texas, and Basu Vaidyanathan, Austin, Texas, for a "component lock tracing by associating component type parameters with particular lock instances." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods for lock tracing at a component level. The method includes associating one or more locks with a component of the operating system; initiating lock tracing for the component; and instrumenting the component-associated locks with lock tracing program instructions in response to initiating lock tracing. The locks are selected from a group of locks configured for use by an operating system and individually comprise locking code. The component lock tracing may be static or dynamic." The patent application was filed on March 27, 2012 (13/431,382). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,429,621&OS=8,429,621&RS=8,429,621 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** National Instruments Assigned Patent ALEXANDRIA, Va., April 24 -- National Instruments, Austin, Texas, has been assigned a patent (8,429,627) developed by four co-inventors for an "asynchronous preemptive edit time semantic analysis of a graphical program." The co-inventors are David C. Jedlicka, Austin, Texas, Jeffrey L. Kodosky, Austin, Texas, Gregory C. Richardson, Round Rock, Texas, and John D. Stanhope, Pflugerville, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "System and method for analyzing a graphical program. A graphical program is displayed on a display. A semantic edit operation is performed on the graphical program in response to user input. The semantic edit operation is performed by a first process. Semantic analysis of the graphical program is performed by a second process in response to performing the semantic edit operation, where the second process is asynchronous with respect to the first process. Results from the semantic analysis of the graphical program are displayed in response to completion of the semantic analysis. If during the semantic analysis, another semantic edit operation is performed on the graphical program, the semantic analysis may be preemptively terminated and re-initiated. Displaying results from the semantic analysis of the graphical program may then include displaying results from the re-initiated semantic analysis of the graphical program in response to completion of the re-initiated semantic analysis." The patent application was filed on Oct. 12, 2009 (12/577,284). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,429,627&OS=8,429,627&RS=8,429,627 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Executable High-level Trace File Generation System ALEXANDRIA, Va., April 24 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,429,619) developed by five co-inventors for an "executable high-level trace file generation system." The co-inventors are Jason T. Albert, Rochester, Minn., Christopher J. Engel, Rochester, Minn., John Farrugia, Austin, Texas, Paul G. Van Leeuwen, Rochester, Minn., and Brent M. Wieman, Minneapolis.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "An executable high-level trace file generation system provides reduced debugging effort and time, particularly on initial startup of new or modified hardware. An executable program invokes high-level application programming interfaces (APIs), to perform various tasks. Instructions within the APIs generate a trace file documenting the invoked sequence of APIs by writing a line to a trace file that documents the API and input parameters received by the API. Upon completion of execution of the API, the return value may be documented as a comment line in the trace file. The resulting trace file is then re-executable as a script and may be edited to alter the sequence of APIs invoked and/or the arguments provided. The script interpreter may be a command line interface through which the APIs are invoked, and trace files may be similarly generated that document sequences of manually entered commands." The patent application was filed on July 3, 2007 (11/772,895). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,429,619&OS=8,429,619&RS=8,429,619 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Apple Assigned Patent ALEXANDRIA, Va., April 24 -- Apple, Cupertino, Calif., has been assigned a patent (8,429,581) developed by Fritz A. Boehm, Dripping Springs, Texas, for a "method for verifying functional equivalence between a reference IC design and a modified version of the reference IC design." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for verifying functional equivalence between a reference integrated circuit (IC) design and a modified version of the reference IC design includes simulating a reference IC design using a simulation stimulus on a test bench and saving the simulation output. The reference IC design corresponds to an IC design model having visibility to comprehensive internal device state. The method may also include simulating a modified version of the reference IC design using the same simulation stimulus on the same test bench, and saving the modified version simulation output. In addition, the simulation outputs of the reference IC design and the modified version are compared to create a comparison result. Lastly, the method may include determining whether the modified version of the reference IC design is functionally equivalent to the reference IC design based upon the comparison result. " The patent application was filed on Aug. 23, 2011 (13/215,284). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,429,581&OS=8,429,581&RS=8,429,581 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Virtual Typing Executables ALEXANDRIA, Va., April 24 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,429,603) developed by Robert Wright Thompson, Austin, Texas, for virtual typing executables.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Computer program product, apparatus, and data processing system for modifying a computer program. According to one embodiment, a new value to replace a value associated with a virtual type in a computer program is received. The new value is received during execution of the computer program by a processor unit. The replacement of the value by the new value modifies the computer program while the computer program is executed by the processor. " The patent application was filed on March 25, 2009 (12/411,018). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,429,603&OS=8,429,603&RS=8,429,603 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Method of Handling a Message ALEXANDRIA, Va., April 24 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,429,451) developed by Thomas J. Freund, Austin, Texas, and Ian Robinson, Hursley, United Kingdom, for a "method of handling a message." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method of handling a message in a messaging system is provided. The messaging system comprises a message source, a message receiver and a message service. The message service is intermediate of the message source and message receiver, wherein a compensation component is established at the message source. The method comprises the steps of, transmitting a one way message, as part of a business transaction, from the message source, the transaction comprising a plurality of one way messages, receiving the message at the message service, transmitting the message from the messaging service, receiving the message at the message receiver, processing the message at the message receiver, transmitting a communication from the message receiver, the communication indicating success or failure of the processing of the message, receiving the communication at the messaging service, and responsive to receiving an indication of a failure of part of the transaction when the communication indicated that processing of the one way message succeeded, causing compensation logic defined by the compensation component to execute." The patent application was filed on Oct. 14, 2009 (12/578,804). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,429,451.PN.&OS=PN/8,429,451&RS=PN/8,429,451 Written by Kusum Sangma; edited by Anand Kumar.

*** Oracle America Assigned Patent ALEXANDRIA, Va., April 24 -- Oracle America, Redwood City, Calif., has been assigned a patent (8,429,636) developed by Yuan C. Chou, Los Gatos, Calif., Jared C. Smolens, San Jose, Calif., and Jeffrey S. Brooks, Austin, Texas, for a "handling dependency conditions between machine instructions." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Techniques for handling dependency conditions, including evil twin conditions, are disclosed herein. An instruction may designate a source register comprising two portions. The source register may be a double-precision register and its two portions may be single-precision portions, each specified as destinations by two other single-precision instructions. Execution of these two single-precision instructions, especially on a register renaming machine, may result in the appropriate values for the two portions of the source register being stored in different physical locations, which can complicate execution of an instruction stream. In response to detecting a potential dependency, one or more instructions may be inserted in an instruction stream to enable the appropriate values to be stored within one physical double precision register, eliminating an actual or potential evil twin dependency. Embodiments including a compiler that inserts instructions in a generated instruction stream to eliminate dependency conditions are also contemplated." The patent application was filed on June 30, 2011 (13/173,415). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,429,636&OS=8,429,636&RS=8,429,636 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** National Instruments Assigned Patent for Automatically Suggesting Graphical Program Elements for Inclusion in a Graphical Program ALEXANDRIA, Va., April 24 -- National Instruments, Austin, Texas, has been assigned a patent (8,429,548) developed by Jonathan Mendez, Austin, Texas, and Brett F. Phillips, Leander, Texas, for an "automatically suggesting graphical program elements for inclusion in a graphical program." The abstract of the patent published by the U.S. Patent and Trademark Office states: "System and method for editing a graphical program. One or more nodes are included in a graphical program in response to user input selecting the one or more nodes, where each node has a respective one or more terminals for receiving input to or providing output from the node. User input is received indicating a terminal on a first node of the one or more nodes to which a node is to be connected. One or more suggested graphical program elements to include in the graphical program are automatically presented based on the indicated terminal, where the one or more suggested graphical program elements are selectable by the user for inclusion in the graphical program." The patent application was filed on Feb. 18, 2010 (12/707,824). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,429,548.PN.&OS=PN/8,429,548&RS=PN/8,429,548 Written by Kusum Sangma; edited by Anand Kumar.

*** National Instruments Assigned Patent ALEXANDRIA, Va., April 24 -- National Instruments, Austin, Texas, has been assigned a patent (8,429,552) developed by five co-inventors for a "function specific property nodes for graphical programs." The co-inventors are Thomas A. Makowski, Austin, Texas, Rajesh Vaidya, Austin, Texas, Deborah E. Bryant, Austin, Texas, Brian M. Johnson, Austin, Texas, and Stephen C. Thorne, Austin, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "System and method for accessing properties of a pre-defined object in a graphical program (GP) operable to perform first functionality. A node icon is displayed in the GP and coupled to the pre-defined object in response to user input, and is associated with program instructions executable to only provide access to a plurality of properties corresponding to the object, and specifying configuration of the object, where the object is associated with a subset of the first functionality. Available properties of the object are displayed, and user input indicating the plurality of properties received. The GP is executed, including executing the property node to: receive input specifying modification of a property, and modify the property to configure the object to perform the subset of the first functionality; and/or to read the property from the pre-defined object, and provide the property to a graphical program element of the GP, e.g., for display." The patent application was filed on Oct. 12, 2009 (12/577,238). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,429,552.PN.&OS=PN/8,429,552&RS=PN/8,429,552 Written by Kusum Sangma; edited by Anand Kumar.

*** Qualcomm Assigned Patent for System and Method to Manage a Translation Lookaside Buffer ALEXANDRIA, Va., April 24 -- Qualcomm, San Diego, has been assigned a patent (8,429,378) developed by Ajay Anant Ingle, Austin, Texas, Erich James Plondke, Austin, Texas, and Muhammad T. Rab, Austin, Texas, for a "system and method to manage a translation lookaside buffer." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method to manage a translation lookaside buffer (TLB) is disclosed. In a particular embodiment, a method of managing a first TLB includes in response to starting execution of a memory instruction, setting a first field associated with an entry of the first TLB to indicate use of the entry. The method also includes setting a second field to indicate that the entry in the first TLB matches a corresponding entry in a second TLB." The patent application was filed on July 6, 2010 (12/830,494). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,429,378.PN.&OS=PN/8,429,378&RS=PN/8,429,378 Written by Kusum Sangma; edited by Anand Kumar.

*** CA Inc. Assigned Patent for Method and System for Encrypting Files Based on Security Rules ALEXANDRIA, Va., April 24 -- CA Inc., Islandia, N.Y., has been assigned a patent (8,429,424) developed by six co-inventors for a "method and system for encrypting files based on security rules." The co-inventors are Russell A. Witt, Plano, Texas, Osvaldo A. Ridner, Folsom, Calif., John M. Casey, Carrollton, Texas, Timothy R. Bruce, Carrollton, Texas, David L. Helsley, Glastonbury, Conn., and Gary Gregory, Lubbock, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "The present disclosure is directed to a method and system for encrypting files based on security rules. In accordance with a particular embodiment of the present disclosure, a request to store a file on a storage device is received. At least one security parameter associated with a security profile of the file is identified. It is determined whether to encrypt the file by applying at least one security rule to the security parameter. The security rule includes selection criteria. The file is encrypted if the security rule indicates the file should be encrypted. The file is stored on the storage device." The patent application was filed on April 20, 2007 (11/737,873). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,429,424.PN.&OS=PN/8,429,424&RS=PN/8,429,424 Written by Kusum Sangma; edited by Anand Kumar.

*** Apple Assigned Patent for Channel Quality Index Feedback Reduction for Broadband Systems ALEXANDRIA, Va., April 24 -- Apple, Cupertino, Calif., has been assigned a patent (8,429,506) developed by Jayesh H. Kotecha, Austin, Texas, for a "channel quality index feedback reduction for broadband systems." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Systems and methodology for exploiting channel correlation in time and/or frequency to reduce CQI feedback in wireless communications systems. By compressing CQI feedback at the receiver to reduce redundancy in CQI feedback information that results from the channel correlation, the average feedback rate is reduced. In various embodiments, redundancy in time may be removed from the CQI feedback by monitoring variations of the CQI information in time at the receiver so that CQI information for a given CQI reporting instance is communicated to the transmitter only if it differs from the CQI information for the previous CQI reporting instance. Otherwise, no feedback is performed. In other embodiments, CQI feedback is compressed by performing a discrete cosine transform (DCT) on the CQI data." The patent application was filed on Sept. 12, 2011 (13/230,683). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,429,506.PN.&OS=PN/8,429,506&RS=PN/8,429,506 Written by Kusum Sangma; edited by Anand Kumar.

*** Cadence Design Systems Assigned Patent ALEXANDRIA, Va., April 24 -- Cadence Design Systems, San Jose, Calif., has been assigned a patent (8,429,438) developed by Anne Espinoza, Austin, Texas, and John MacLaren, Austin, Texas, for a "method and apparatus for transferring data between asynchronous clock domains." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An invention is provided for transferring data between asynchronous clock domains. The asynchronous clock domains include a source clock domain operating with a source clock signal and a receiving clock domain operating with a receiving clock signal. The invention includes determining a phase shift relationship between the source clock signal and a signal. When the phase shift relationship is below a predetermined threshold the data is transferred between the source clock domain and the receiving clock domain using a first plurality of stage operations. When the phase shift relationship is above the predetermined threshold, the data is transferred between the source clock domain and the receiving clock domain using a second plurality of stage operations that delay data transfer an additional half period of the source clock signal." The patent application was filed on May 5, 2009 (12/435,550). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,429,438.PN.&OS=PN/8,429,438&RS=PN/8,429,438 Written by Kusum Sangma; edited by Anand Kumar.

*** Dell Products Assigned Patent ALEXANDRIA, Va., April 24 -- Dell Products, Round Rock, Texas, has been assigned a patent (8,429,432) developed by four co-inventors for a "stand-by power system for information handling systems." The co-inventors are Terry Matula, Austin, Texas, Vaibhav P. Sapre, Austin, Texas, Stephen Seitsinger, Austin, Texas, and John Stuewe, Round Rock, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A power supply system includes a power supply coupled to a load via a main power rail, and a switch coupled between the power supply and the load on an auxiliary power rail. A controller controls the switch to couple the auxiliary power rail to the load in response to a startup command, and the controller controls the switch to uncouple the load from the auxiliary power rail in response to a shut down command and a low power mode being enabled." The patent application was filed on Oct. 22, 2009 (12/603,993). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,429,432.PN.&OS=PN/8,429,432&RS=PN/8,429,432 Written by Kusum Sangma; edited by Anand Kumar.

*** Verizon Patent and Licensing Assigned Patent ALEXANDRIA, Va., April 24 -- Verizon Patent and Licensing, Basking Ridge, N.J., has been assigned a patent (8,429,683) developed by Sudeep Dasgupta, Irving, Texas, for a program viewing history.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method may include tracking program viewing information via a set-top box and storing the tracked program viewing information." The patent application was filed on March 23, 2007 (11/690,644). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,429,683&OS=8,429,683&RS=8,429,683 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** AT&T Intellectual Property I Assigned Patent for System and Method to Deliver Video Content ALEXANDRIA, Va., April 24 -- AT&T Intellectual Property I, Atlanta, has been assigned a patent (8,429,701) developed by Armstrong Soo, San Ramon, Calif., Bernard Ku, Austin, Texas, and Zhi Li, Martinez, Calif., for a "system and method to deliver video content." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method of delivering video content includes identifying a television program scheduled to be broadcast at a time during a peak viewing period, and identifying a recipient multimedia storage device that is to receive video content associated with the television program. The method also includes sending the video content associated with the television program to the recipient multimedia storage device during a non-peak viewing period that precedes the peak viewing period. The video content includes data to prevent viewing of the video content prior to the time when the television program is scheduled to be broadcast." The patent application was filed on Dec. 11, 2008 (12/332,485). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,429,701&OS=8,429,701&RS=8,429,701 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Dynamically Adjusting an Operating State of a Data Processing System Running Under a Power Cap ALEXANDRIA, Va., April 24 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,429,433) developed by four co-inventors for a "dynamically adjusting an operating state of a data processing system running under a power cap." The co-inventors are John B. Carter, Austin, Texas, Heather L. Hanson, Austin, Texas, Karthick Rajamani, Austin, Texas, and Malcolm S. Ware, Austin, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A mechanism is provided for dynamically power capping one or more units. A power capping mechanism sets a counter value corresponding to an initial energy budget assigned to a unit for a given interval. Responsive to the unit receiving an operation to perform during the given interval, the power capping mechanism decrements the counter value by a decrement value. Responsive to the given interval expiring, the power capping mechanism sends the counter value to a power control loop in the data processing system, receives a new energy budget from the power control loop, and resets the counter value to a value corresponding to the new energy budget assigned to the unit for a next interval." The patent application was filed on Jan. 15, 2010 (12/688,214). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,429,433.PN.&OS=PN/8,429,433&RS=PN/8,429,433 Written by Kusum Sangma; edited by Anand Kumar.

*** International Business Machines Assigned Patent for Information Handling System Including a Multiple Compute Element Processor with Distributed Data On-ramp Data-off Ramp Topology ALEXANDRIA, Va., April 24 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,429,382) developed by four co-inventors for an "information handling system including a multiple compute element processor with distributed data on-ramp data-off ramp topology." The co-inventors are Robert Alan Cargnoni, Austin, Texas, Gary Alan Gorman, Austin, Texas, Charles Francis Marino, Round Rock, Texas, and Julie Ann Rosser, Austin, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A symmetric multi-processing (SMP) processor includes a primary interconnect trunk for communication of information between multiple compute elements situated along the primary interconnect trunk. The processor also includes a secondary interconnected trunk that may be oriented perpendicular with respect to the primary interconnect trunk. The processor distributes data on-ramps and data off-ramps across the data lanes of a data trunk of the primary interconnect trunk to enable communication with compute elements and other structures both on-chip and off-chip." The patent application was filed on April 30, 2008 (12/112,780). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,429,382.PN.&OS=PN/8,429,382&RS=PN/8,429,382 Written by Kusum Sangma; edited by Anand Kumar.

*** RPX Assigned Patent ALEXANDRIA, Va., April 24 -- RPX, San Francisco, has been assigned a patent (8,429,725) developed by Eric White, Austin, Texas, and Patrick Turley, Austin, Texas, for a "system and method for providing a secure connection between networked computers." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Embodiments disclosed herein provide a system, method, and computer program product for establishing a secure network connection between a client and a server. The client may send a connection request over a public network to the server. The server may prepare a response containing a controller and session-specific credentials. The controller may be selected to configure a tunneling protocol on the client. After being downloaded to the client, the controller configures the tunneling protocol and establishes a secure network connection with the server without user intervention. The session-specific credentials are valid until the secure network connection between the client and the server is severed." The patent application was filed on June 30, 2011 (13/173,764). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,429,725&OS=8,429,725&RS=8,429,725 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Oracle America Assigned Patent for Dynamic Tag Allocation in a Multithreaded Out-of-order Processor ALEXANDRIA, Va., April 24 -- Oracle America, Redwood City, Calif., has been assigned a patent (8,429,386) developed by Paul J. Jordan, Austin, Texas, Robert T. Golla, Round Rock, Texas, and Jama I. Barreh, Austin, Texas, for a "dynamic tag allocation in a multithreaded out-of-order processor." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Various techniques for dynamically allocating instruction tags and using those tags are disclosed. These techniques may apply to processors supporting out-of-order execution and to architectures that supports multiple threads. A group of instructions may be assigned a tag value from a pool of available tag values. A tag value may be usable to determine the program order of a group of instructions relative to other instructions in a thread. After the group of instructions has been (or is about to be) committed, the tag value may be freed so that it can be re-used on a second group of instructions. Tag values are dynamically allocated between threads; accordingly, a particular tag value or range of tag values is not dedicated to a particular thread." The patent application was filed on June 30, 2009 (12/494,532). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,429,386.PN.&OS=PN/8,429,386&RS=PN/8,429,386 Written by Kusum Sangma; edited by Anand Kumar.

*** AT&T Intellectual Property I Assigned Patent ALEXANDRIA, Va., April 24 -- AT&T Intellectual Property I, Atlanta, has been assigned a patent (8,429,702) developed by Mehrad Yasrebi, Austin, Texas, and Bernard Ku, Austin, Texas, for "methods and apparatus for selecting and pushing customized electronic media content." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods and an apparatus for selecting and pushing customized electronic media content are disclosed. An example method selects a piece of electronic media content based on user characteristic data associated with a user; identifies a storage capacity of a user device associated with the user; and pushes at least a first portion of the selected piece of electronic media content to a user device associated with the user prior to the user demanding the selected piece of electronic media content, the first portion being selected based on the storage capacity of the user device." The patent application was filed on Sept. 11, 2006 (11/530,711). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,429,702&OS=8,429,702&RS=8,429,702 Written by Satyaban Rath; edited by Hemanta Panigrahi.

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