DARPA, Industry Collaborate To Knock Down Microelectronics Barriers
(Targeted News Service Via Acquire Media NewsEdge) WASHINGTON, Jan. 17 -- The U.S. Department of Defense's Defense Advanced Research Projects Agency issued the following news release:
The inherent goodness of miniaturizing electronics has been key to a wide array of technology innovations and an important economic driver for several decades. For example, the seemingly endless shrinking of the transistor has allowed the semiconductor industry to place ever more devices on the same amount of silicon. Each time the size shrunk, transistors became faster and used less power, allowing increasingly capable electronics in smaller packages that cost less. In recent years, power requirements, excessive heat and other problems associated with physical limitations have reduced the advantages of continuing to shrink size. For the foreseeable future, industry will continue to decrease the size of transistors, increase the number of integrated cores and improve all aspects of the existing architectures. While challenging problems must be met and the ability to achieve the potential improvements is far from assured, these changes are likely to produce more evolutionary improvements.
Working together, the Defense Advanced Research Projects Agency (DARPA) along with key companies from the semiconductor and defense industries are establishing the Semiconductor Technology Advanced Research Network (STARnet). This effort will support large university communities to look beyond the current evolutionary directions and make the discoveries that will drive technology innovation beyond what can be imagined for electronics today. This community of leading academics will be supported by the combined resources and expertise of DARPA and participating companies, including at least $40 million each year in basic research funding.
"STARnet is composed of six collaborating multi-university teams taking a fresh look at the challenges we face, to find those ideas that will drive innovation for the next several decades. Each of these six centers is composed of several university teams jointly working toward a single goal: knocking down the barriers that limit the future of electronics" said Jeffrey Rogers (http://www.darpa.mil/Our_Work/MTO/Personnel/Dr__Jeffrey_Rogers.aspx), DARPA program manager. "With such an ambitious task, we have implemented a nonstandard approach. Instead of several different universities competing against each other for a single contract, we now have large teams working collaboratively, each contributing their own piece toward a large end goal."
The six academic teams are grouped into the following centers:
Function Accelerated nanomaterial Engineering (FAME): The FAME Center focuses on nonconventional materials and devices incorporating nanostructures with quantum-level properties to enable analog, logic and memory devices for beyond-binary computation. FAME is hosted at the University of California-Los Angeles with collaborators from Caltech, Cornell, Columbia, MIT, North Carolina State University, Purdue, Rice, Stanford, University of California-Irvine, University of California-Berkeley, University of California-Riverside, University of California-Santa Barbara, and Yale.
Center for Spintronic Materials, Interfaces and Novel Architectures (C_SPIN): Electron spin-based memory and computation have the potential to overcome the power, performance and architectural constraints of conventional CMOS-based devices. C_SPIN focuses on magnetic materials, spin transport, novel spin-transport materials, spintronic devices, circuits and novel architectures. C_SPIN is hosted at the University of Minnesota with collaborators from Carnegie-Mellon University, Cornell University, Johns Hopkins University, Massachusetts Institute of Technology, Pennsylvania State University, Purdue University, University of Alabama, University of California-Riverside, University of California-Santa Barbara, University of Iowa, University of Michigan, and University of Wisconsin-Madison.
Systems on Nanoscale Information fabriCs (SONIC): Explores a drastic shift in the model of computation and communication from a deterministic digital foundation to a statistical one. Many applications such as imaging processing and communications do not require one hundred percent perfectly error free computation and this Center will produce new strategies and designs optimized with this in mind. SONIC is hosted at the University of Illinois-Urbana Champaign with collaborators from the University of California-Berkeley, University of California-San Diego, Stanford University, Oregon State University, Princeton University, University of Michigan-Ann Arbor, and Carnegie Mellon University.
Center for Low Energy Systems Technology (LEAST): The overriding goal is low power electronics. For this purpose it addresses nonconventional materials and quantum-engineered devices, and projects implementation in novel integrated circuits and computing architectures. LEAST is hosted at Notre Dame University, with collaborators from Carnegie Mellon University, Georgia Tech, Penn State University, Purdue University, University of California-Berkeley, University of California-San Diego, University of California-Santa Barbara, University of Texas-Dallas and University of Texas-Austin.
The Center for Future Architectures Research (C-FAR) The scope of C-FAR is to investigate highly parallel computing implemented in nonconventional computing systems, but based on current CMOS integrated circuit technology. C-Far is based at the University of Michigan with collaborators from Columbia University, Duke University, Georgia Institute of Technology, Harvard University, Massachusetts Institute of Technology, Northeastern University, Princeton university, Stanford University, University of California-Berkeley, University of California-San Diego, University of California-Los Angeles, University of Illinois, Urbana-Champaign, University of Virginia and the University of Washington.
The TerraSwarm Research Center (TerraSwarm): The Center will focus on the challenge of developing technologies that provide innovative, city-scale capabilities via the deployment of distributed applications on shared swarm platforms. Two scenarios are of interest: a city during normal operation and a city during natural or man-made disasters (such as accidents, failures, hurricanes, earthquakes or terrorist attacks). Terraswarm is hosted at the University of California-Berkeley with collaborators from California Institute of Technology, Carnegie Mellon University, University of California-San Diego, University of Illinois-Urbana Champaign, University of Michigan, University of Pennsylvania, University of Texas-Dallas, and the University of Washington.
"STARnet is working on tomorrow's technology and also developing tomorrow's technologists," added Rogers. "Today's graduate students are getting the hands-on experience they need to apply these breakthroughs to future Defense and commercial systems."
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