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U.S. Patents Awarded to Inventors in New York (April 18)
(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service
Targeted News Service
ALEXANDRIA, Va., April 18 -- The following federal patents were awarded to inventors in New York.
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International Business Machines Assigned Patent
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,206) developed by Caroline Benveniste, New York, Vittorio Castelli, Croton-on-Hudson, N.Y., and Peter A. Franaszek, Mount Kisco, N.Y., for a "method and system for storing memory compressed data onto memory compressed disks."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "In a computer system supporting memory compression and wherein data is stored on a disk in a different compressed format, and wherein an IOA (input/output adaptor)/IOP (input/output processor) selectively reads from and writes to a main memory through a direct memory access (DMA) operation, a method for transmitting compressed data from the IOA/IOP to the main memory includes reserving a set of free memory sectors to contain the data in said main memory, sending to the IOA/IOP addresses of said memory sectors, copying the data from the IOA/IOP to said memory sectors using said DMA operation, constructing at the IOA/IOP compressed memory directory information defining how and where the data is stored in memory, sending the memory directory information to a memory controller, and storing the memory directory information in the compressed memory directory structure."
The patent application was filed on April 8, 2011 (13/083,400). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,206&OS=8,161,206&RS=8,161,206
Written by Arpi Sharma; edited by Anand Kumar.
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Teleshuttle Tech2 Assigned Patent
ALEXANDRIA, Va., April 18 -- Teleshuttle Tech2, New York, has been assigned a patent (8,161,172) developed by Richard Reisman, New York, for a "method and apparatus for browsing using multiple coordinated device sets."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Systems and methods for navigating hypermedia using multiple coordinated input/output device sets. Disclosed systems and methods allow a user and/or an author to control what resources are presented on which device sets (whether they are integrated or not), and provide for coordinating browsing activities to enable such a user interface to be employed across multiple independent systems. Disclosed systems and methods also support new and enriched aspects and applications of hypermedia browsing and related business activities."
The patent application was filed on Sept. 2, 2009 (12/553,014). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,172&OS=8,161,172&RS=8,161,172
Written by Arpi Sharma; edited by Anand Kumar.
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AT&T Intellectual Property I Assigned Patent for Filtering Unwanted Data Traffic Via a Per-customer Blacklist
ALEXANDRIA, Va., April 18 -- AT&T Intellectual Property I, Atlanta, has been assigned a patent (8,161,155) developed by Jacobus Erasmus Van Der Merwe, New Providence, N.J., Karim El Defrawy, Irvine, Calif., and Balachander Krishnamurthy, New York, for "filtering unwanted data traffic via a per-customer blacklist."
The abstract of the patent published by the U.S. Patent and Trademark Office states: " Traffic flow from a traffic source with a source IP address to a customer system with a destination IP address is filtered by comparing the source IP address to a customer blacklist. If the source IP address is on the customer blacklist, then traffic to the customer system is blocked; else, traffic to the customer system is allowed. The customer blacklist is generated from a network blacklist, comprising IP addresses of unwanted traffic sources, and a customer whitelist, comprising IP addresses of wanted traffic sources. The customer blacklist is generated by removing from the network blacklist any IP address also on the customer whitelist. The network blacklist is generated by acquiring raw blacklists from reputation systems. IP addresses on the raw blacklists are sorted by prefix groups, which are rank ordered by traffic frequency. Top prefix groups are selected for the network blacklist."
The patent application was filed on Sept. 29, 2008 (12/286,213). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,155&OS=8,161,155&RS=8,161,155
Written by Arpi Sharma; edited by Anand Kumar.
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International Business Machines Assigned Patent for System, Method, and Computer Readable Media for Replicating Virtual Universe Objects
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,002) developed by six co-inventors for a "system, method, and computer readable media for replicating virtual universe objects." The co-inventors are Vittorio Castelli, Croton on Hudson, N.Y., Rick A. Hamilton II, Charlottesville, Va., Steven M. Harrison, Bremerton, Wash., Brian M. O'Connell, Cary, N.C., Clifford A. Pickover, Yorktown Heights, N.Y., and Keith R. Walker, Austin, Texas.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system, a method and a computer readable media for replicating virtual universe objects are provided. In one exemplary embodiment, the method includes determining a first set of VU objects associated with a first user. The method further includes determining replication priority values for the first set of VU objects utilizing predetermined priority value rules. Each VU object of the first set of VU objects has a replication priority value. The method further includes determining a second set of VU objects from the first set of VU objects based on the replication priority values associated with the first set of VU objects. The method further includes replicating the second set of VU objects from a primary VU computer server to a first device."
The patent application was filed on May 28, 2008 (12/128,056). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,161,002.PN.&OS=PN/8,161,002&RS=PN/8,161,002
Written by Shabnam Sheikh; edited by Jaya Anand.
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International Business Machines Assigned Patent for Stream Processing Workflow Composition Using Automatic Planning
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,187) developed by seven co-inventors for a "stream processing workflow composition using automatic planning." The co-inventors are Kay S. Anderson, Washington, Joseph Phillip Bigus, Rochester, Minn., Mark David Feblowitz, Winchester, Mass., Genady Ya. Grabarnik, Scarsdale, N.Y., Nagui Halim, Yorktown Heights, N.Y., Zhen Liu, Tarrytown, N.Y., and Anton V. Riabov, Ossining, N.Y.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "An automatic planning system is provided for stream processing workflow composition. End users provide requests to the automatic planning system. The requests are goal-based problems to be solved by the automatic planning system, which then generates plan graphs to form stream processing applications. A scheduler deploys and schedules the stream processing applications for execution within an operating environment. The operating environment then returns the results to the end users."
The patent application was filed on May 2, 2008 (12/114,105). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,187&OS=8,161,187&RS=8,161,187
Written by Arpi Sharma; edited by Anand Kumar.
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International Business Machines Assigned Patent for Faceted Web Searches of User Preferred Categories Throughout One or More Taxonomies
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,044) developed by four co-inventors for a "faceted web searches of user preferred categories throughout one or more taxonomies." The co-inventors are Jason M. Blackwell, Vestal, N.Y., Claude J. Elie, Vestal, N.Y., Danny R. Hager, Binghamton, N.Y., and Clare T. Kibler, Binghamton, N.Y.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method of web searching is provided. The method comprises defining one or more user preferred categories and conducting a search within the one or more user preferred categories based upon search criteria by comparing the search criteria to content information within each of the one or more user preferred categories. The method further includes displaying search results associated with each of the preferred categories which have matching criteria based on the conducted search."
The patent application was filed on Oct. 26, 2005 (11/258,130). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,044&OS=8,161,044&RS=8,161,044
Written by Arpi Sharma; edited by Anand Kumar.
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Achronix Semiconductor Assigned Patent
ALEXANDRIA, Va., April 18 -- Achronix Semiconductor, Santa Clara, Calif., has been assigned a patent (8,161,435) developed by four co-inventors for a reset mechanism conversion. The co-inventors are Rajit Manohar, Ithaca, N.Y., Clinton W. Kelly, San Jose, Calif., Virantha Ekanayake, San Jose, Calif., and Gael Paul, Aix-en-Provence, France.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods, circuits, and systems for converting reset mechanisms in a synchronous circuit design into a corresponding asynchronous representation are described. These may operate to convert synchronous state holding blocks that include reset signals to corresponding asynchronous dataflow logic blocks. A replicated reset token at a fraction of the operational frequency of the reset signal may be distributed to the locations of the asynchronous dataflow logic blocks. Additional methods, circuits, and systems are disclosed."
The patent application was filed on July 20, 2009 (12/505,653). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,435&OS=8,161,435&RS=8,161,435
Written by Satyaban Rath; edited by Hemanta Panigrahi.
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International Business Machines Assigned Patent for Method for Performing Decimal Floating Point Addition
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,091) developed by Steven R. Carlough, Poughkeepsie, N.Y., Wen H. Li, Poughkeepsie, N.Y., and Eric M. Schwarz, Gardiner, N.Y., for a "method for performing decimal floating point addition."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for performing a decimal floating point operation including receiving a first operand having a first coefficient and a first exponent into a first register. A second operand having a second coefficient and a second exponent are received into a second register. An operation, either addition or subtraction, associated with the first operand and the second operand is received. Three concurrent calculations are performed on the first operand and the second operand. The three concurrent calculations include: applying the operation to the first operand and the second operand based on a first assumption; applying the operation to the first operand and the second operand based on a second assumption; and applying the operation to the first operand and the second operand based on a third assumption. A final result is selected from the first result, the second result and the third result."
The patent application was filed on Jan. 23, 2009 (12/358,911). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,091&OS=8,161,091&RS=8,161,091
Written by Arpi Sharma; edited by Anand Kumar.
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Frayman Group Assigned Patent
ALEXANDRIA, Va., April 18 -- Frayman Group, Brooklyn, N.Y., has been assigned a patent (8,161,060) developed by Yuri Frayman, Sunny Isles Beach, Fla., Serge Danilov, Brooklyn, N.Y., and Alp Hug, Thornhill, Canada, for "methods and systems for identifying, assessing and clearing conflicts of interest."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods and systems for identifying, assessing and clearing conflicts of interest are described herein. Consistent with some embodiments, a conflicts management system receives a conflict search request, and processes the request utilizing a risk matrix that encompass and represents the risk tolerance or risk profile of a law firm. The risk matrix maps certain request types to different search queries and rules that are to be evaluated for a given request type. Based on the execution of the queries and the rules for the request, a score is assigned to a party, such that the score represents the level of risk that would be undertaken if the party was engaged as a client."
The patent application was filed on Dec. 18, 2009 (12/642,701). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,060&OS=8,161,060&RS=8,161,060
Written by Arpi Sharma; edited by Anand Kumar.
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FX Alliance Assigned Patent
ALEXANDRIA, Va., April 18 -- FX Alliance, New York, has been assigned a patent (8,160,950) developed by Neill Penney, Surrey, United Kingdom, and David Wright, New York, for a "method and apparatus for trading assets."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Method and apparatus for trading financial assets, such as foreign exchange and money market instruments, commodities and securities. The invention, which may be accessed over an interconnected data communications network, such as the Internet, using a standard Web browser, as well as via a proprietary user interface, receives customer requirements, automatically combines and organizes those requirements into a batch of orders according to a set of customer preferences, and displays the batch of orders to the customer, along with indicative or actual price quotes, such that the customer may select and process multiple orders and multiple requirements simultaneously. Orders are priced and booked automatically."
The patent application was filed on Nov. 7, 2003 (10/703,090). The full-text of the patent can be found at http://patft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,160,950.PN.&OS=PN/8,160,950&RS=PN/8,160,950
Written by Shabnam Sheikh; edited by Jaya Anand.
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International Business Machines Assigned Patent for Performing an Allreduce Operation Using Shared Memory
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,480) developed by four co-inventors for a "performing an allreduce operation using shared memory." The co-inventors are Charles J. Archer, Rochester, Minn., Gabor Dozsa, Ardsley, N.Y., Joseph D. Ratterman, Rochester, Minn., and Brian E. Smith, Rochester, Minn.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods, apparatus, and products are disclosed for performing an allreduce operation using shared memory that include: receiving, by at least one of a plurality of processing cores on a compute node, an instruction to perform an allreduce operation; establishing, by the core that received the instruction, a job status object for specifying a plurality of shared memory allreduce work units, the plurality of shared memory allreduce work units together performing the allreduce operation on the compute node; determining, by an available core on the compute node, a next shared memory allreduce work unit in the job status object; and performing, by that available core on the compute node, that next shared memory allreduce work unit."
The patent application was filed on May 29, 2007 (11/754,782). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,480&OS=8,161,480&RS=8,161,480
Written by Satyaban Rath; edited by Hemanta Panigrahi.
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International Business Machines Assigned Patent for Prioritization of Networks for Preferred Groups
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,143) developed by Sara H. Basson, White Plains, N.Y., and Dimitri Kanevsky, Ossining, N.Y., for a "prioritization of networks for preferred groups."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "The present invention provides prioritization of networks for preferred groups, which decreases network delays when a person from a preferred group is using networks. Generally, the present invention determines if network information is assigned to a preferred group, and configures a network to assign a higher priority to the network information when the network information is assigned to a preferred group, the higher priority being relative to network information not assigned to one or more preferred groups. There are a variety of techniques that can be used to assign higher priority to network information, such as using any of the following exemplary techniques: marking network information as being assigned to a preferred group; preferentially handling, transmitting and receiving network information assigned to a preferred group; determining faster routes for network information assigned to a preferred group; and assigning additional resources to applications that handle network information assigned to a preferred group."
The patent application was filed on March 30, 2001 (09/822,703). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,143&OS=8,161,143&RS=8,161,143
Written by Arpi Sharma; edited by Anand Kumar.
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ARRIS Group Assigned Patent
ALEXANDRIA, Va., April 18 -- ARRIS Group, Suwanee, Ga., has been assigned a patent (8,161,516) developed by four co-inventors for a "fraud detection in a cable television." The co-inventors are Robert F. Cruickshank III, Big Indian, N.Y., Marcel F. Schemmann, Marea Hoop, The Netherlands, Steven W. Moyer, Boalsburg, Pa., and Daniel J. Rice, Portland, Ore.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "One or more of a topology location test and a distance test are applied to determine if a CPE device has moved in a cable plant. An indication of service fraud is provided if the CPE topology location or distance test indicate an unauthorized CPE device move."
The patent application was filed on June 20, 2007 (11/821,084). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,516&OS=8,161,516&RS=8,161,516
Written by Satyaban Rath; edited by Hemanta Panigrahi.
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International Business Machines Assigned Patent for Performance Degradation Root Cause Prediction in a Distributed Computing System
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,058) developed by four co-inventors for a "performance degradation root cause prediction in a distributed computing system." The co-inventors are Manoj K. Agarwal, Noida, India, Gautam Kar, Yorktown Heights, N.Y., Anindya Neogi, New Delhi, India, and Anca Sailer, Scarsdale, N.Y.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method of identifying at least one resource in a distributed computing system which is a potential root cause of performance degradation of the system includes the steps of: computing operational bounds for the system and operational bounds for at least one resource in the system; comparing current end-to-end system performance with the operational bounds for the system; when the current end-to-end system performance is outside of the operational bounds for the system, comparing current performance of the at least one resource in the system with the operational bounds for the at least one resource; and generating at least one output identifying the at least one resource in the system which is a potential root cause of performance degradation of the system."
The patent application was filed on March 27, 2008 (12/056,530). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,058&OS=8,161,058&RS=8,161,058
Written by Arpi Sharma; edited by Anand Kumar.
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International Business Machines Assigned Patent for Management of Heterogeneous Software Artifacts through a Common Representation
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,456) developed by five co-inventors for a "management of heterogeneous software artifacts through a common representation." The co-inventors are Karunakar Bojjireddy, Apex, N.C., Carroll E. Fulkerson Jr., Raleigh, N.C., Jim A. Laredo, Katonah, N.Y., Gregory J. Rosensteel, Chappaqua, N.Y., and Amber Roy Chowdhury, Cary, N.C.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for managing a configuration of heterogeneous software artifacts through a common central configuration representation includes adding a plurality of software artifacts from an initial software solution to a heterogeneous configuration tool. Using this heterogeneous configuration tool, artifact-level configuration parameters are extracted out of selected software artifacts by the heterogeneous configuration tool. The extracted artifact-level configuration parameters are then presented in a single representation. A subset of the presented extracted artifact-level configuration parameters is mapped to a set of solution-level parameters, which are then exposed in a subsequent software solution. Thereafter, parameters for one or more of the solution-level parameters, which are used by the subsequent software solution, are exposed. These parameters for the subsequent software solution are then mapped back to the artifact-level configuration parameters of the subsequent software solution."
The patent application was filed on May 30, 2007 (11/755,072). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,456&OS=8,161,456&RS=8,161,456
Written by Satyaban Rath; edited by Hemanta Panigrahi.
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International Business Machines Assigned Patent for Sharing of Data Across Disjoint Clusters
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,128) developed by Harry M. Yudenfriend, Poughkeepsie, N.Y., for "sharing of data across disjoint clusters."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods and devices are provided for sharing data across two or more different clusters. An operating system (OS) in a cluster checks a metadata record of a file system of a shared device to retrieve path group identifiers (PGIDs). A control unit list of the shared device is checked to retrieve PGIDs that are active on the shared device. An input/output supervisor (IOS) record in a couple dataset is checked to retrieve PGIDs in the cluster. The metadata record, control unit list, and IOS record are compared, and if a PGID is found in the metadata record that is not in the IOS record and if the found PGID is not in the control unit list, the found PGID is not active on the shared device. The found PGID of the different cluster is removed from metadata record, and members of the cluster can R/W to file system."
The patent application was filed on Dec. 16, 2009 (12/639,338). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,128&OS=8,161,128&RS=8,161,128
Written by Arpi Sharma; edited by Anand Kumar.
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Xerox Assigned Patent
ALEXANDRIA, Va., April 18 -- Xerox, Norwalk, Conn., has been assigned a patent (8,160,992) developed by four co-inventors for a "system and method for selecting a package structural design." The co-inventors are Barry Glynn Gombert, Rochester, N.Y., John Oliver Walker, Rochester, N.Y., Philip Crane Rose, Sodus, N.Y., and Jennifer Colleen Perotti, Pittsford, N.Y.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method of selecting a package model may include maintaining a data structure of a plurality of package models. Each package model may have a plurality of package model attributes including at least a size and a style. A user input may be received that is descriptive of a desired package capability. The user input may be analyzed using a semantic reasoner to determine one or more desired attributes. One or more package models may be automatically selected by accessing the data structure wherein, for each selected package model, each desired attribute satisfies the corresponding package model attribute. The one or more selected package models may be presented."
The patent application was filed on May 15, 2008 (12/121,179). The full-text of the patent can be found at http://patft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,160,992.PN.&OS=PN/8,160,992&RS=PN/8,160,992
Written by Shabnam Sheikh; edited by Jaya Anand.
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Messagemind Assigned Patent
ALEXANDRIA, Va., April 18 -- Messagemind, New York, has been assigned a patent (8,161,122) developed by Manish Chander Sood, Airmont, N.Y., Cheng-Rong Ruan, Flushing, N.Y., and Alain Oberrotman, Rye Brook, N.Y., for a "system and method of dynamically prioritized electronic mail graphical user interface, and measuring email productivity and collaboration trends."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method for managing electronic communications more effectively utilizes electronic communications. The method assigns a prioritization score and category to each electronic communication so that a user can more effectively manage the communications. The user interacts with a graphical user interface to effectively manage electronic communications. The system arranges and displays the electronic communications according to prioritization scores and categories, and includes interactive modules to override a system assigned prioritization scores and assign any score or category the user selects. The method also measures productivity of users as a function of at least three different metrics, a decision-making metric; a communication metric; and a processing metric, and takes into account prioritization scores and the amount of time it takes users to effectively utilize the electronic communications. The method also generates reports of the productivity of individual users, and the productivity of relationships between multiple users of electronic communications."
The patent application was filed on Nov. 13, 2007 (11/939,396). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,122&OS=8,161,122&RS=8,161,122
Written by Arpi Sharma; edited by Anand Kumar.
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International Business Machines Assigned Patent for Fast and Accurate Method to Simulate Intermediate Range Flare Effects
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,422) developed by five co-inventors for a "fast and accurate method to simulate intermediate range flare effects." The co-inventors are Maharaj Mukherjee, Wappingers Falls, N.Y., James A. Culp, Newburgh, N.Y., Scott M. Mansfield, Hopewell Junction, N.Y., Kafai Lai, Poughkeepsie, N.Y., Alan E. Rosenbluth, Yorktown Heights, N.Y.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method is provided for modeling lithographic processes in the design of photomasks for the manufacture of semiconductor integrated circuits, and more particularly for simulating intermediate range flare effects. For a region of influence (ROI) from first ROI1 of about 5.lamda./NA to distance ROI2 when the point spread function has a slope that is slowly varying according to a predetermined criterion, then mask shapes at least within the distance range from ROI1 to ROI2 are smoothed prior to computing the SOCS convolutions. The method provides a fast method for simulating intermediate range flare effects with sufficient accuracy."
The patent application was filed on Jan. 6, 2006 (12/349,108). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,422&OS=8,161,422&RS=8,161,422
Written by Satyaban Rath; edited by Hemanta Panigrahi.
***
International Business Machines, Infineon Technologies Assigned Patent for Calibration and Verification Structures for Use in Optical Proximity Correction
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., and Infineon Technologies, Neubiberg, Germany, have been assigned a patent (8,161,421) developed by five co-inventors for a "calibration and verification structures for use in optical proximity correction." The co-inventors are Ramya Viswanathan, Wappingers Falls, N.Y., Amr Y. Abdo, Wappingers Falls, N.Y., Henning Haffner, Pawling, N.Y., Oseo Park, Hopewell Junction, N.Y., and Michael E. Scaman, Goshen, N.Y.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method of training an Optical Proximity Correction (OPC) model comprises symmetrizing a complex design to be a test pattern having orthogonal symmetry. Symmetrizing may comprise establishing a axis of symmetry passing through the design, thereby dividing the design into two portions; deleting one of the two portions; and mirror-imaging the other of the two portions about the axis of symmetry. The design may be centered."
The patent application was filed on July 7, 2008 (12/168,383). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,421&OS=8,161,421&RS=8,161,421
Written by Satyaban Rath; edited by Hemanta Panigrahi.
***
Eastman Kodak Assigned Patent
ALEXANDRIA, Va., April 18 -- Eastman Kodak, Rochester, N.Y., has been assigned a patent (8,161,063) developed by Marcello Balduccini, Penfield, N.Y., and Sara Girotto, Penfield, N.Y., for a "multimedia object retrieval from natural language queries."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for identifying multi-media assets from a multi-media collection, and the method implemented at least in part by a data processing system and comprising the steps of: receiving a search query, the search query, or a derivative thereof, including a possessive phrase, wherein the possessive phrase includes a possessor and a possession category; identifying a denoted object referred to by the possessive phrase using a predefined relationship database that establishes social relationships between objects; identifying one or more additional possessors of the denoted object using the predefined relationship database; generating one or more additional possessive phrases for the denoted objects relating the identified additional possessors to the denoted object; and identifying one or more multi-media assets from the multi-media collection containing the denoted object responsive to the one or more additional possessive phrases."
The patent application was filed on Sept. 11, 2009 (12/557,543). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,063&OS=8,161,063&RS=8,161,063
Written by Arpi Sharma; edited by Anand Kumar.
***
International Business Machines Assigned Patent for System and Method for Adaptive Categorization for Use with Dynamic Taxonomies
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,028) developed by Jianying Hu, Bronx, N.Y., Aleksandra Mojsilovic, New York, and Moninder Singh, Farmington, Conn., for a "system and method for adaptive categorization for use with dynamic taxonomies."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system, method and computer program product provides a solution to a class of categorization problems using a semi-supervised clustering approach, the method employing performing a Soft Seeded k-means algorithm, which makes effective use of the side information provided by seeds with a wide range of confidence levels, even when they do not provide complete coverage of the pre-defined categories. The semi-supervised clustering is achieved through the introductions of a seed re-assignment penalty measure and model selection measure."
The patent application was filed on Dec. 5, 2008 (12/315,724). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,028&OS=8,161,028&RS=8,161,028
Written by Arpi Sharma; edited by Anand Kumar.
***
International Business Machines Assigned Patent for Visualization for Aggregation of Change Tracking Information
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,160,910) developed by Jason B. Ellis, New York, Laurent Hasson, New York, and Peter K. Malkin, Ardsley, N.Y., for a "visualization for aggregation of change tracking information."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method within a system wherein a first user of the system provides information on social patterns to a second user includes: receiving a request for social pattern information from the second user, the request comprising a query; assigning authorization level to the second user for restricting the type and amount of data provided to the second user; providing information on social patterns to the second user according to the second user's authorization level; and storing information about the second user to be used in future transactions with the second user, the information including transactional fee data and subscription data for notifying the second user of additional social patterns as they develop."
The patent application was filed on Sept. 19, 2011 (13/236,224). The full-text of the patent can be found at http://patft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,160,910.PN.&OS=PN/8,160,910&RS=PN/8,160,910
Written by Shabnam Sheikh; edited by Jaya Anand.
***
International Business Machines Assigned Patent for Techniques for Data Prefetching Using Indirect Addressing with Offset
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,264) developed by four co-inventors for "techniques for data prefetching using indirect addressing with offset." The co-inventors are Ravi K. Arimilli, Austin, Texas, Balaram Sinharoy, Poughkeepsie, N.Y., William E. Speight, Austin, Texas, and Lixin Zhang, Austin, Texas.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A technique for performing data prefetching using indirect addressing includes determining a first memory address of a pointer associated with a data prefetch instruction. Content, that is included in a first data block (e.g., a first cache line) of a memory, at the first memory address is then fetched. An offset is then added to the content of the memory at the first memory address to provide a first offset memory address. A second memory address is then determined based on the first offset memory address. A second data block (e.g., a second cache line) that includes data at the second memory address is then fetched (e.g., from the memory or another memory). A data prefetch instruction may be indicated by a unique operational code (opcode), a unique extended opcode, or a field (including one or more bits) in an instruction."
The patent application was filed on Feb. 1, 2008 (12/024,246). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,264.PN.&OS=PN/8,161,264&RS=PN/8,161,264
Written by Kusum Sangma; edited by Anand Kumar.
***
International Business Machines Assigned Patent for Techniques for Indirect Data Prefetching
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,263) developed by four co-inventors for "techniques for indirect data prefetching." The co-inventors are Ravi K. Arimilli, Austin, Texas, Balaram Sinharoy, Poughkeepsie, N.Y., William E. Speight, Austin, Texas, and Lixin Zhang, Austin, Texas.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A processor includes a first address translation engine, a second address translation engine, and a prefetch engine. The first address translation engine is configured to determine a first memory address of a pointer associated with a data prefetch instruction. The prefetch engine is coupled to the first translation engine and is configured to fetch content, included in a first data block (e.g., a first cache line) of a memory, at the first memory address. The second address translation engine is coupled to the prefetch engine and is configured to determine a second memory address based on the content of the memory at the first memory address. The prefetch engine is also configured to fetch (e.g., from the memory or another memory) a second data block (e.g., a second cache line) that includes data at the second memory address."
The patent application was filed on Feb. 1, 2008 (12/024,239). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,263&OS=8,161,263&RS=8,161,263
Written by Kusum Sangma; edited by Anand Kumar.
***
International Business Machines Assigned Patent for Simplifying and Speeding the Management of Intra-node Cache Coherence
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,248) developed by eight co-inventors for "simplifying and speeding the management of intra-node cache coherence." The co-inventors are Matthias A. Blumrich, Ridgefield, Conn., Dong Chen, Croton on Hudson, N.Y., Paul W. Coteus, Yorktown Heights, N.Y., Alan G. Gara, Mount Kisco, N.Y., Mark E. Giampapa, Irvington, N.Y., Phillip Heidelberger, Cortlandt Manor, N.Y., Dirk Hoenicke, Ossining, N.Y., and Martin Ohmacht, Yorktown Heights, N.Y.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method and apparatus for managing coherence between two processors of a two processor node of a multi-processor computer system. Generally the present invention relates to a software algorithm that simplifies and significantly speeds the management of cache coherence in a message passing parallel computer, and to hardware apparatus that assists this cache coherence algorithm. The software algorithm uses the opening and closing of put/get windows to coordinate the activated required to achieve cache coherence. The hardware apparatus may be an extension to the hardware address decode, that creates, in the physical memory address space of the node, an area of virtual memory that (a) does not actually exist, and (b) is therefore able to respond instantly to read and write requests from the processing elements."
The patent application was filed on Nov. 24, 2010 (12/953,770). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,248&OS=8,161,248&RS=8,161,248
Written by Kusum Sangma; edited by Anand Kumar.
***
Vetra Systems Assigned Patent
ALEXANDRIA, Va., April 18 -- Vetra Systems, Hauppauge, N.Y., has been assigned a patent (8,161,220) developed by Jonas Ulenas, Port Washington, N.Y., for a "method and apparatus for enhancing universal serial bus applications."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system for enhancing universal serial bus (USB) applications comprises an upstream processor, a downstream processor and a main controller. The upstream processor accepts standard USB signals from a USB host and independently provides responses required by USB specification within the required time frame. The upstream processor also contains storage for descriptors for a device associated with this upstream processor. The main controller obtains the descriptors by commanding the downstream processor, and passes them to the upstream processor. The downstream processor connectable to USB-compliant devices accepts the USB signals from the USB-compliant devices and provides responses required by USB specification within the required time frame. The main controller interconnects the upstream and downstream processors, and provides timing independence between upstream and downstream timing. The main controller also commands the downstream processor to obtain device descriptors independent of the USB host."
The patent application was filed on May 24, 2011 (13/114,062). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8161220.PN.&OS=PN/8161220&RS=PN/8161220
Written by Kusum Sangma; edited by Anand Kumar.
***
International Business Machines Assigned Patent for Temperature-aware Buffered Caching for Solid State Storage
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,241) developed by five co-inventors for a "temperature-aware buffered caching for solid state storage." The co-inventors are Bishwaranjan Bhattacharjee, Hawthorne, N.Y., Mustafa Canim, Dallas, Christian A. Lang, Hawthorne, N.Y., George A. Mihaila, Hawthorne, N.Y., and Kenneth A. Ross, Hawthorne, N.Y.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method for managing a cache includes monitoring a temperature of regions on a secondary storage based on a cumulative cost to access pages from each region of the secondary storage. Similar temperature pages are grouped in logical blocks. Data is written to a cache in a logical block granularity by overwriting cooler blocks with hotter blocks."
The patent application was filed on Jan. 12, 2010 (12/686,022). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8161241.PN.&OS=PN/8161241&RS=PN/8161241
Written by Kusum Sangma; edited by Anand Kumar.
***
International Business Machines Assigned Patent for Method and System for Analog Frequency Clocking in Processor Cores
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,314) developed by Lawrence Jacobowitz, Wappingers Falls, N.Y., Mark B. Ritter, Sherman, Conn., and Daniel J. Stigliani Jr., Hopewell Junction, N.Y., for a "method and system for analog frequency clocking in processor cores."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method of and system for frequency clocking in a processor core are disclosed. In this system, at least one processor core is provided, and that at least one processor core has a clocking subsystem for generating an analog output clock signal at a variable frequency. Digital frequency control data and an analog signal are both transmitted to that at least one processor core; and that processor core uses the received analog signal and digital frequency control data to set the frequency of the output clock signal of the clocking subsystem. In a preferred implementation, multiple cores are asynchronously clocked and the core frequencies are independently set."
The patent application was filed on April 12, 2007 (11/734,334). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,314.PN.&OS=PN/8,161,314&RS=PN/8,161,314
Written by Kusum Sangma; edited by Anand Kumar.
***
International Business Machines Assigned Patent for Techniques for Multi-level Indirect Data Prefetching
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,265) developed by four co-inventors for "techniques for multi-level indirect data prefetching." The co-inventors are Ravi K. Arimilli, Austin, Texas, Balaram Sinharoy, Poughkeepsie, N.Y., William E. Speight, Austin, Texas, and Lixin Zhang, Austin, Texas.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A technique for performing data prefetching using multi-level indirect data prefetching includes determining a first memory address of a pointer associated with a data prefetch instruction. Content that is included in a first data block (e.g., a first cache line of a memory) at the first memory address is then fetched. A second memory address is then determined based on the content at the first memory address. Content that is included in a second data block (e.g., a second cache line) at the second memory address is then fetched (e.g., from the memory or another memory). A third memory address is then determined based on the content at the second memory address. Finally, a third data block (e.g., a third cache line) that includes another pointer or data at the third memory address is fetched (e.g., from the memory or the another memory)."
The patent application was filed on Feb. 1, 2008 (12/024,260). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,161,265&OS=8,161,265&RS=8,161,265
Written by Kusum Sangma; edited by Anand Kumar.
***
International Business Machines Assigned Patent for Adaptive Spill-receive Mechanism for Lateral Caches
ALEXANDRIA, Va., April 18 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,161,242) developed by Moinuddin K. Qureshi, White Plains, N.Y., for an "adaptive spill-receive mechanism for lateral caches."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Improving cache performance in a data processing system is provided. A cache controller monitors a counter associated with a cache. The cache controller determines whether the counter indicates that a plurality of non-dedicated cache sets within the cache should operate as spill cache sets or receive cache sets. The cache controller sets the plurality of non-dedicated cache sets to spill an evicted cache line to an associated cache set in another cache in the event of a cache miss in response to an indication that the plurality of non-dedicated cache sets should operate as the spill cache sets. The cache controller sets the plurality of non-dedicated cache sets to receive an evicted cache line from another cache set in the event of the cache miss in response to an indication that the plurality of non-dedicated cache sets should operate as the receive cache sets."
The patent application was filed on Aug. 1, 2008 (12/184,737). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8161242.PN.&OS=PN/8161242&RS=PN/8161242
Written by Kusum Sangma; edited by Anand Kumar.
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