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U.S. Patents Awarded to Inventors in Arizona (Sept. 16)(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., Sept. 16 -- The following federal patents were awarded to inventors in Arizona. *** Enertron Assigned Patent ALEXANDRIA, Va., Sept. 15 -- Enertron, Tempe, Ariz., has been assigned a patent (8,018,139) developed by Der Jeou Chou, Mesa, Ariz., for a "light source and method of controlling light spectrum of an LED light engine." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A light emitting diode (LED) light engine includes a substrate for supporting the LED light engine. Conductive traces are formed over the substrate using a thick film screen printing, physical vapor deposition, chemical vapor deposition, electrolytic plating, printed circuit board fabricating, or electroless plating process. The conductive traces include mounting pads. LEDs are mounted to each of the mounting pads for electrical interconnection. The LEDs include red LEDs, green LEDs and blue LEDs. Each of the blue LEDs is at least partially covered with a yellow phosphor coating compound. The concentration of the yellow phosphor coating compound is controlled to allow the emission of blue and yellow spectrum light energy from each blue LED. Emissions of light energy from the red LEDs, green LEDs and blue LEDs are combined to achieve a target correlated color temperature and a target color rendering index for the LED light engine." The patent application was filed on Nov. 4, 2008 (12/264,723). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=80,18,139.PN.&OS=PN/80,18,139&RS=PN/80,18,139 Written by Ruby Maibam; edited by Jaya Anand. *** Tempronics Assigned Patent ALEXANDRIA, Va., Sept. 15 -- Tempronics, Tucson, Ariz., has been assigned a patent (8,018,117) developed by Tarek Makansi, Tucson, Ariz., for a "closely spaced electrodes with a uniform gap." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An improved design for maintaining separation between electrodes in tunneling, diode, thermionic, thermophotovoltaic and other devices is disclosed. At least one electrode is made from flexible material. A magnetic field is present to combine with the current flowing in the flexible electrode and generate a force that counterbalances the electrostatic force or other attracting forces between the electrodes. The balancing of forces allows separation and parallelism between the electrodes to be maintained at a very small spacing without requiring the use of multiple control systems, actuators, or other manipulating means, or spacers. The shape of one or both electrodes is designed to maintain a constant separation over the entire overlapping area of the electrodes. The end result is an electronic device that maintains two closely spaced parallel electrodes in stable equilibrium with a uniform gap therebetween over a large area in a simple configuration for simplified manufacturability and use to convert heat to electricity or electricity to cooling." The patent application was filed on Jan. 22, 2007 (12/302,782). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=80,18,117.PN.&OS=PN/80,18,117&RS=PN/80,18,117 Written by Ruby Maibam; edited by Jaya Anand. *** Farinella & Associates Assigned Patent ALEXANDRIA, Va., Sept. 16 -- Farinella & Associates, Chandler Heights, Ariz., has been assigned a patent (8,018,796) developed by Maureen M. Farinella, Chandler Heights, Ariz., and Joseph A. Farinella, Chandler Heights, Ariz., for a "bookmark with integrated electronic timer and method therefor." The abstract of the patent published by the U.S. Patent and Trademark Office states: "According to an example embodiment, an electronic bookmark includes a header and an electronic timer disposed within the header of the electronic bookmark. The electronic bookmark further includes a display disposed on a first surface of the header. The display of the electronic bookmark is configured to display an output of the electronic timer. The electronic bookmark further includes a plurality of control buttons disposed on the header, where the control buttons are configured to control the electronic timer. The electronic bookmark further includes a substrate that extends from the header. In the electronic bookmark, a thickness of the substrate is less than a thickness of the header. In the electronic bookmark, a first surface of the substrate is substantially coplanar with a second surface of the header, and the second surface of the header is opposite the first surface of the header." The patent application was filed on Jan. 12, 2011 (13/005,399). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,018,796.PN.&OS=PN/8,018,796&RS=PN/8,018,796 Written by Ankita Das; edited by Jaya Anand. *** Honeywell International Assigned Patent ALEXANDRIA, Va., Sept. 16 -- Honeywell International, Morristown, N.J., has been assigned a patent (8,018,696) developed by Terry L. Ahrendt, Mesa, Ariz., for a "tertiary lock system power unit." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system for moving an aircraft thrust reverser component includes a power drive unit, a thrust reverser actuator assembly, and a tertiary lock system. The power drive unit is operable to rotate and supply a rotational drive force. The thrust reverser actuator assembly receives the rotational drive force from the power drive unit and moves the thrust reverser component between a stowed position and a deployed position. The tertiary lock system selectively engages and disengages the thrust reverser component and includes a tertiary lock power unit, an electromechanical tertiary lock assembly, and a voltage limiting circuit. The voltage limiting circuit limits the voltage magnitude of a control signal supplied to the tertiary lock assembly to a predetermined value." The patent application was filed on May 5, 2008 (12/115,375). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,018,696&OS=8,018,696&RS=8,018,696 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Ajjer Assigned Patent ALEXANDRIA, Va., Sept. 16 -- Ajjer, Tucson, Ariz., has been assigned a patent (8,018,638) developed by Robert S. LeCompte, Tucson, Ariz., Juan Carlos L. Tonazzi, Tucson, Ariz., and Anoop Agrawal, Tucson, Ariz., for a "fabrication of cell cavities for electrooptic devices." The abstract of the patent published by the U.S. Patent and Trademark Office states: "This invention discloses methods to dispense adhesives for fabricating multiple electrooptic devices. In addition the invention also discloses on how the cavities of these electrooptic devices may be filled by an injection process. The Electrooptic devices of this invention may comprise liquid or solid electrolytes." The patent application was filed on Nov. 24, 2008 (12/277,135). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,018,638&OS=8,018,638&RS=8,018,638 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Hemisphere GPS Assigned Patent ALEXANDRIA, Va., Sept. 16 -- Hemisphere GPS, Calgary, Canada, has been assigned a patent (8,018,376) developed by four co-inventors for a "GNSS-based mobile communication system and method." The co-inventors are John A. McClure, Scottsdale, Ariz., Dennis M. Collins, Fountain Hills, Ariz., Aaron C. Stichter, Apache Junction, Ariz., and John T.E. Timm, San Jose, Calif. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A GNSS-based, bidirectional mobile communication system includes a mobile unit, such as a vehicle or a personal mobile system, with GNSS (e.g., GPS) and Internet (worldwide web) access. A base station also has GNSS and Internet access, and provides differential (e.g., DGPS) correctors to the mobile unit via the Internet. The Internet communications link enables audio and/or video (AV) clips to be recorded and played back by the mobile unit based on its GNSS location. The playback function can be triggered by the mobile unit detecting a predetermined GNSS location associated with a particular clip, which can be GNSS position-stamped when recorded. Alternatively, clips can be generated by utilities and loaded by the application either from a personal computer or automatically over the Internet. Moreover, maps, vehicle travel paths and images associated with particular GNSS-defined locations, such as waypoints, can be updated and position-stamped on the data server. A GNSS-based mobile communication method and a storage medium encoded with a machine-readable code for mobile communications are also provided." The patent application was filed on April 6, 2009 (12/419,140). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=80,18,376&OS=80,18,376&RS=80,18,376 Written by Rajat Puri; edited by Jaya Anand. *** Quantance Assigned Patent ALEXANDRIA, Va., Sept. 16 -- Quantance, San Mateo, Calif., has been assigned a patent (8,018,277) developed by Serge Francois Drogi, Flagstaff, Ariz., and Vikas Vinayak, Menlo Park, Calif., for a "RF power amplifier system with impedance modulation." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A power amplifier controller circuit controls an adjustable impedance matching network at the output of a power amplifier to vary its load line to improve the efficiency of the RF PA. The PA controller circuit comprises an amplitude control loop that determines an amplitude correction signal. The amplitude loop is configured to control or correct for distortion from the adjustable matching network based upon the amplitude correction signal." The patent application was filed on Aug. 20, 2010 (12/860,732). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,018,277.PN.&OS=PN/8,018,277&RS=PN/8,018,277 Written by Anjali Jha; edited by Jaya Anand. *** Southwest Windpower Assigned Patent ALEXANDRIA, Va., Sept. 16 -- Southwest Windpower, Flagstaff, Ariz., has been assigned a patent (8,018,081) developed by David Gregory Calley, Flagstaff, Ariz., for a "wind turbine and method of manufacture." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A variable voltage and frequency output wind turbine. Variations of the wind turbine include use of a slotless alternator to reduce alternator noise, a high power AC output to facilitate transmission of the output over extended distances, AC to DC converters and DC to AC converters, and sensors for systems and devices to receive the wind turbine output and to allow matching of the output to the receiving devices and system. Other features include a removable hatchcover for dissipating heat from components contained in the turbine or attached to the hatchcover, a swept blade design to reduce blade-produced noise, and power storage components for storing and intermittently using energy stored as a result of wind turbine power generation." The patent application was filed on July 17, 2006 (11/487,392). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,018,081.PN.&OS=PN/8,018,081&RS=PN/8,018,081 Written by Ankita Das; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., Sept. 16 -- Intel, Santa Clara, Calif., has been assigned a patent (8,018,073) developed by Nirupama Chakrapani, Chandler, Ariz., Vijay S. Wakharkar, Paradise Valley, Ariz., and Chris Matayabas, Chandler, Ariz., for an "electronic packages with fine particle wetting and non-wetting zones." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Spreading or keep out zones may be formed in integrated circuit packages by altering the roughness of package surfaces. The surface roughness can be altered by applying or growing particles having a dimension less than 500 nanometers. Hydrophilic surfaces may be made hemi-wicking and hydrophobic surfaces may be made hemi-wicking by particles of the same general characteristics." The patent application was filed on March 17, 2011 (13/050,034). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,018,073.PN.&OS=PN/8,018,073&RS=PN/8,018,073 Written by Ankita Das; edited by Jaya Anand. *** Amkor Technology Assigned Patent ALEXANDRIA, Va., Sept. 16 -- Amkor Technology, Chandler, Ariz., has been assigned a patent (8,018,068) developed by Christopher Marc Scanlan, Chandler, Ariz., and Ronald Patrick Huemoeller, Chandler, Ariz., for a "semiconductor package including a top-surface metal layer for implementing circuit features." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A semiconductor package including a top-surface metal layer for implementing circuit features provides improvements in top-surface interconnect density, more flexible routing and mounting of top surface semiconductor packages, dies and passive components or a conformal shield cap implementation. The metal layer interconnected with an internal substrate of the semiconductor package by blind vias laser-ablated through the encapsulation and filled with metal. The vias extend from the top surface to an internal package substrate or through the encapsulation to form bottom-side terminals. The metal layer may be formed by circuit patterns and/or terminals embedded within the encapsulation conformal to the top surface by laser-ablating channels in the top surface of the encapsulation and filling the channels with metal. A conformal coating may be applied to the top surface of the semiconductor package over the metal layer to prevent solder bridging to circuit patterns of the metal layer." The patent application was filed on Oct. 28, 2009 (12/589,839). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,018,068.PN.&OS=PN/8,018,068&RS=PN/8,018,068 Written by Ankita Das; edited by Jaya Anand. *** Amkor Technology Assigned Patent ALEXANDRIA, Va., Sept. 16 -- Amkor Technology, Chandler, Ariz., has been assigned a patent (8,018,072) developed by Jeffrey A. Miks, Chandler, Ariz., and Jui Min Lim, Chandler, Ariz., for a "semiconductor package having a heat spreader with an exposed exterion surface and a top mold gate." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A semiconductor device has a substrate. A die is attached to a first surface of the substrate. A heat sink is provided having an approximately planer member and support members extending from the planer member. The support members are attached to the first surface of the substrate to form a cavity over the die with the planer member positioned above the die. An encapsulant is provided for encapsulating the device, wherein an exterior surface of the planer member is exposed. A non-tapered opening is formed in the planer member. The encapsulant is injected through the opening to encapsulate the cavity and the encapsulant will partially fill the non-tapered opening." The patent application was filed on Dec. 23, 2008 (12/342,386). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,018,072.PN.&OS=PN/8,018,072&RS=PN/8,018,072 Written by Ankita Das; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., Sept. 16 -- Intel, Santa Clara, Calif., has been assigned a patent (8,018,063) developed by Daewoong Suh, Phoenix, Ariz., Stephen E. Lehman Jr., Chandler, Ariz., and Mukul Renavikar, Chandler, Ariz., for a "solder joint reliability in microelectronic packaging." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A microelectronic assembly and method for fabricating the same are described. In an example, a microelectronic assembly includes a microelectronic device having a surface with one or more areas to receive one or more solder balls, the one or more areas having a surface finish comprising Ni. A solder material comprising Cu, such as flux or paste, is applied to the Ni surface finish and one or more solder balls are coupled to the microelectronic device by a reflow process that forms a solder joint between the one or more solder balls, the solder material comprising Cu, and the one or more areas having a surface finish comprising Ni." The patent application was filed on Oct. 30, 2009 (12/610,211). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,018,063.PN.&OS=PN/8,018,063&RS=PN/8,018,063 Written by Ankita Das; edited by Jaya Anand. *** Texas Instruments Assigned Patent ALEXANDRIA, Va., Sept. 16 -- Texas Instruments, Dallas, has been assigned a patent (8,018,238) developed by Ronald F. Cormier Jr., Tucson, Ariz., for an "embedded sar based active gain capacitance measurement system and method." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system for measuring a capacitor (C.sub.SENj) precharges a CDAC (23) in a SAR converter (17) to a reference voltage (V.sub.AZ) and also precharges a first terminal (3-j) of the capacitor to another reference voltage (GND). During a measurement phase, the CDAC is coupled between an output and an input of an amplifier (31) and the capacitor also is coupled to the input of the amplifier, so as to redistribute charge between the capacitor and the CDAC. The amplifier generates an output voltage (V.sub.AMP) representing the capacitance being measured. The output voltage is stored in the CDAC. The SAR converter converts the output voltage to a digital value representing the capacitance being measured." The patent application was filed on March 27, 2009 (12/383,696). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,018,238.PN.&OS=PN/8,018,238&RS=PN/8,018,238 Written by Shabnam Sheikh; edited by Jaya Anand. *** Minebea Assigned Patent ALEXANDRIA, Va., Sept. 16 -- Minebea, Nagano, Japan, has been assigned a patent (8,018,186) developed by Scott Frankel, Gilbert, Ariz., and Christopher Best, Phoenix, for a "method and apparatus of fan motor brake." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An electronic system for controlling a fan motor includes a microcontroller and a drive circuit. The microcontroller draws power from a first voltage source and generates control signals for sending drive current to stator coils of a fan motor via the drive circuit. The electronic system further includes a second voltage source to provide the microcontroller with an amount of energy sufficient to operate for a short period of time when the voltage of the first voltage source drops below a predetermined level. The microcontroller is configured to detect when the voltage level of the first voltage source drops below a given level and generates control signals for the drive circuit to discharge energy in the stator coils of the fan motor to quickly stop operation of the fan motor within a short period of time." The patent application was filed on Sept. 17, 2008 (12/212,561). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,018,186.PN.&OS=PN/8,018,186&RS=PN/8,018,186 Written by Shabnam Sheikh; edited by Jaya Anand. *** Intel Assigned Patent for Adaptive Video De-interlacing ALEXANDRIA, Va., Sept. 16 -- Intel, Santa Clara, Calif., has been assigned a patent (8,018,530) developed by Tiehan Lu, Chandler, Ariz., for an adaptive video de-interlacing. The abstract of the patent published by the U.S. Patent and Trademark Office states: "In some embodiments, a method includes receiving a plurality of video signal fields, characterizing at least one portion of at least one of the plurality of video signal fields, determining a value for a pixel using inter-field de-interlacing if the characterization satisfies a first criteria, determining a value for a pixel using motion compensated de-interlacing if the characterization satisfies a second criteria, and determining a value for a pixel using intra-field de-interlacing if the characterization satisfies a third criteria. In some embodiments, an apparatus includes a storage medium having stored instructions that when executed by a machine result in the method." The patent application was filed on Dec. 29, 2006 (11/648,259). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8018530.PN.&OS=PN/8018530&RS=PN/8018530 Written by Kusum Sangma; edited by Anand Kumar. For more information about Targeted News Service products and services, please contact: Myron Struck, editor, Targeted News Service LLC, Springfield, Va., 703/304-1897; [email protected]; http://targetednews.com. -1061342 (c) 2011 Targeted News Service |