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U.S. Patents Awarded to Inventors in Oregon (Aug. 31)(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., Aug. 31 -- The following federal patents were awarded to inventors in Oregon. *** Terra Nova Nurseries Assigned Patent ALEXANDRIA, Va., Aug. 31 -- Terra Nova Nurseries, Canby, Ore., has been assigned a patent (PP22,104) developed by Janet N. Egger, Wilsonville, Ore., for a "X Heucherella plant named 'Golden Zebra'." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A new and distinct Heucherella plant substantially as shown and described, characterized by yellow spring leaves with a strong red pattern along veins, summer leaves yellow green to lime with red to dark brown in over half the leaf center, distinctively lobed, palmately divided leaves, and a medium plant size." The patent application was filed on May 11, 2010 (12/800,257). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=PP22,104&OS=PP22,104&RS=PP22,104 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Terra Nova Nurseries Assigned Patent for Heuchera Plant Named 'Autumn Leaves' ALEXANDRIA, Va., Aug. 31 -- Terra Nova Nurseries, Canby, Ore., has been assigned a patent (PP22,103) developed by Janet N. Egger, Wilsonville, Ore., for a "heuchera plant named 'Autumn Leaves'." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A new and distinct hybrid of Heuchera plant characterized by leaves colored brick red in spring and fall and amber and tan in summer, bicolor red purple and light pink flowers, and excellent tolerance to heat and humidity." The patent application was filed on May 11, 2010 (12/800,256). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=PP22,103&OS=PP22,103&RS=PP22,103 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Oracle International Assigned Patent ALEXANDRIA, Va., Aug. 31 -- Oracle International, Redwood Shores, Calif., has been assigned a patent (RE42,664) developed by Gary Hallmark, Portland, Ore., and Daniel Leary, New Ipswich, N.H., for a "method and apparatus for implementing parallel operations in a database management system." The abstract of the patent published by the U.S. Patent and Trademark Office states: "The present invention implements parallel processing in a Database Management System. The present invention provides the ability to locate transaction and recovery information at one location and eliminates the need for read locks and two-phased commits. The present invention provides the ability to dynamically partition row sources for parallel processing. Parallelism is based on the ability to parallelize a row source, the partitioning requirements of consecutive row sources and the entire row source tree, and any specification in the SQL statement. A Query Coordinator assumes control of the processing of a entire query and can execute serial row sources. Additional threads of control, Query Server, execute a parallel operators. Parallel operators are called data flow operators (DFOs). A DFO is represented as structured query language (SQL) statements and can be executed concurrently by multiple processes, or query slaves. A central scheduling mechanism, a data flow scheduler, controls a parallelized portion of an execution plan, and can become invisible for serial execution. Table queues are used to partition and transport rows between sets of processes. Node linkages provide the ability to divide the plan into independent lists that can each be executed by a set of query slaves. The present invention maintains a bit vector that is used by a subsequent producer to determine whether any rows need to be produced to its consumers. The present uses states and a count of the slaves that have reached these states to perform its scheduling tasks." The patent application was filed on Jan. 5, 2001 (09/757,399). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=RE42,664&OS=RE42,664&RS=RE42,664 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Intel Assigned Patent for Automatic Task Performance as Scheduled Using Embedded Secondary Processor ALEXANDRIA, Va., Aug. 31 -- Intel, Santa Clara, Calif., has been assigned a patent (8,010,965) developed by Bernard Keany, Lake Oswego, Ore., and Hormuzd Khosravi, Portland, Ore., for an "automatic task performance as scheduled using embedded secondary processor." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system, apparatus and method to receive, schedule, and perform a task automatically on a multi-processor device are described herein. In various embodiments, the multi-processor device is a member of a home network environment." The patent application was filed on Aug. 31, 2006 (11/469,368). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,010,965&OS=8,010,965&RS=8,010,965 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Intel Assigned Patent for Mechanism for Monitoring Instruction Set Based Thread Execution on a Plurality of Instruction Sequencers ALEXANDRIA, Va., Aug. 31 -- Intel, Santa Clara, Calif., has been assigned a patent (8,010,969) developed by 13 co-inventors for a "mechanism for monitoring instruction set based thread execution on a plurality of instruction sequencers." The co-inventors are Richard A. Hankins, San Jose, Calif., Gautham N. Chinya, Hillsboro, Ore., Hong Wang, Fremont, Calif., Shivnandan D. Kaushik, Portland, Ore., Bryant E. Bigbee, Scottsdale, Ariz., John P. Shen, San Jose, Calif., Trung A. Diep, San Jose, Calif., Xiang Zou, Beaverton, Ore., Baiju V. Patel, Portland, Ore., Paul M. Petersen, Champaign, Ill., Sanjiv M. Shah, Champaign, Ill., Ryan N. Rakvic, Palo Alto, Calif., and Prashant Sethi, Folsom, Calif. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A technique to monitor software thread performance and update software that issues or uses the thread(s) to reduce performance-inhibiting events. At least one embodiment of the invention uses hardware and/or software timers or counters to monitor various events associated with executing user-level threads and report these events back to a user-level software program, which can use the information to avoid or at least reduce performance-inhibiting events associated with the user-level threads." The patent application was filed on June 13, 2005 (11/151,809). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,010,969&OS=8,010,969&RS=8,010,969 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Synopsys Assigned Patent ALEXANDRIA, Va., Aug. 31 -- Synopsys, Moountain View, Calif., has been assigned a patent (8,010,913) developed by Amyn A. Poonawala, Portland, Ore., Benjamin D. Painter, Portland, Ore., and Levi D. Barnes, Hillsboro, Ore., for a "model-based assist feature placement using inverse imaging approach." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Some embodiments provide techniques and systems to identify locations in a target mask layout for placing assist features. During operation, an embodiment can determine a spatial sampling frequency to sample the target mask layout, wherein sampling the target mask layout at the spatial sampling frequency prevents spatial aliasing in a gradient of a cost function which is used for computing an inverse mask field. Next, the system can generate a grayscale image by sampling the target mask layout at the spatial sampling frequency. The system can then compute the inverse mask field by iteratively modifying the grayscale image. The system can use the gradient of the cost function to guide the iterative modification process. Next, the system can filter the inverse mask field using a morphological operator, and use the filtered inverse mask field to identify assist feature locations in the target mask layout." The patent application was filed on April 14, 2009 (12/386,199). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,010,913&OS=8,010,913&RS=8,010,913 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Digimarc Assigned Patent ALEXANDRIA, Va., Aug. 31 -- Digimarc, Beaverton, Ore., has been assigned a patent (8,010,632) developed by Geoffrey B. Rhoads, West Linn, Ore., for a "steganographic encoding for video and images." The abstract of the patent published by the U.S. Patent and Trademark Office states: "The presently claimed invention relates generally to digital watermarking and steganographic data hiding for video and images. One claim recites a method of connecting a user computing device to one of a plurality of remote computers available for communication over a network. The method includes: a) obtaining streaming data representing a two dimensional color image or video, the two dimensional color image or video including an index steganographically hidden therein through alterations to the two dimensional color image or video; b) analyzing the streaming data to obtain the index; c) accessing a database with the index, the database comprising a plurality of records that associate an index to a pointer, the pointer identifying a remote computer on the network, in which the pointer is determined as a function of the index; and d) using the pointer to establish communication with the remote computer identified thereby. Of course, additional claims and combinations are provided as well." The patent application was filed on April 6, 2010 (12/755,167). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=80,10,632.PN.&OS=PN/80,10,632&RS=PN/80,10,632 Written by Rajat Puri; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., Aug. 31 -- Intel, Santa Clara, Calif., has been assigned a patent (8,010,587) developed by Mohan J. Kumar, Aloha, Ore., and Shay Gueron, Haifa, Ill., for a random number generator. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Systems, methods, and other embodiments associated with random number generators are described. One system embodiment includes a random number generator logic that may produce an initial random number from a first set of three inputs. The system embodiment may receive the three inputs from sources including an internal counter entropy source (ICES), an internal arbitrary entropy source (IAES), and an external entropy source (EES). The system embodiment may generate a first random number from a first set of three inputs (e.g., value from ICES, value from IAES, value from EES) but may then generate subsequent random numbers from a different set of three inputs (e.g., value from ICES, value from IAES, previous random number)." The patent application was filed on Sept. 6, 2007 (11/899,574). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=80,10,587.PN.&OS=PN/80,10,587&RS=PN/80,10,587 Written by Rajat Puri; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., Aug. 31 -- Intel, Santa Clara, Calif., has been assigned a patent (8,010,731) developed by six co-inventors for an "integrating non-peripheral component interconnect (PCI) resource into a personal computer system." The co-inventors are Arvind Mandhani, San Francisco, Woojong Han, Phoenix, Ken Shoemaker, Los Altos Hills, Calif., Madhu Athreya, Saratoga, Calif., Mahesh Wagh, Portland, Ore., and Shreekant S. Thakkar, Portland, Ore. The abstract of the patent published by the U.S. Patent and Trademark Office states: "In one embodiment, the present invention includes an apparatus having an adapter to communicate according to a personal computer (PC) protocol and a second protocol. A first interface coupled to the adapter is to perform address translation and ordering of transactions received from upstream of the adapter. The first interface is coupled in turn to heterogeneous resources, each of which includes an intellectual property (IP) core and a shim, where the shim is to implement a header of the PC protocol for the IP core to enable its incorporation into the apparatus without modification. Other embodiments are described and claimed." The patent application was filed on July 22, 2010 (12/841,889). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,010,731.PN.&OS=PN/8,010,731&RS=PN/8,010,731 Written by Arpi Sharma; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., Aug. 31 -- Intel, Santa Clara, Calif., has been assigned a patent (8,010,821) developed by Jim Edwards, Portland, Ore., John C. Weast, Porland, Ore., and Gunner D. Danneels, Beaverton, Ore., for "systems and methods for wake on event in a network." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Embodiments include systems and methods for allowing a host CPU to sleep while service presence packets and responses to search requests are sent by an alternate processor. While the CPU is in a low power state, the alternate processor monitors the network for incoming request packets. Also, while the CPU is asleep, the alternate processor periodically may transmit presence packets, announcing the presence of a service available from the host system of the CPU. In one embodiment, the alternate processor is a low power processor. If a search request is received when the CPU is in a low power state, the alternate processor responds to the search request according to whether the PC provides that service. If a service request is received, then the ME wakes the CPU of the PC to provide the requested service. In the wireless case, when the CPU is asleep, portions of the wireless upper MAC are implemented by the ME. When the CPU is awake the wireless upper MAC is implemented in the CPU. Thus, embodiments enable the PC to appear available to wireless devices when the CPU is asleep." The patent application was filed on Sept. 19, 2007 (11/901,928). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,010,821.PN.&OS=PN/8,010,821&RS=PN/8,010,821 Written by Kusum Sangma; edited by Anand Kumar. *** Intel Assigned Patent for Method and System for Reducing Power Consumption of Active Web Page Content ALEXANDRIA, Va., Aug. 31 -- Intel, Santa Clara, Calif., has been assigned a patent (8,010,816) developed by Carl K. Wong, Portland, Ore., and Adriaan Van De Ven, Portland, Ore., for a "method and system for reducing power consumption of active web page content." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method and system for reducing power consumption of active web page content includes identifying those threads associated with active advertisement components of the web page and synchronizing the wakeup periods of such threads such that the total number of wakeups over a given period is reduced." The patent application was filed on Dec. 31, 2008 (12/347,175). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,010,816.PN.&OS=PN/8,010,816&RS=PN/8,010,816 Written by Kusum Sangma; edited by Anand Kumar. *** Intel Assigned Patent for Apparatus and Methods for Negotiating a Capability in Establishing a Peer-to-peer Communication Link ALEXANDRIA, Va., Aug. 31 -- Intel, Santa Clara, Calif., has been assigned a patent (8,010,778) developed by Meiyuan Zhao, Santa Clara, Calif., and Jesse R. Walker, Portland, Ore., for an "apparatus and methods for negotiating a capability in establishing a peer-to-peer communication link." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Apparatus and method to negotiate parameters of a policy in establishment of a peer-to-peer link are described herein. In an embodiment, a security policy is negotiated in establishment of a peer-to-peer link in a wireless mesh network." The patent application was filed on June 13, 2007 (11/762,426). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,010,778.PN.&OS=PN/8,010,778&RS=PN/8,010,778 Written by Kusum Sangma; edited by Anand Kumar. *** Intel Assigned Patent for Methods and Apparatus for Providing Integrity Protection for Management and Control Traffic of Wireless Communication Networks ALEXANDRIA, Va., Aug. 31 -- Intel, Santa Clara, Calif., has been assigned a patent (8,010,780) developed by Kapil Sood, Beaverton, Ore., Jesse R. Walker, Portland, Ore., and Emily H. Qi, Portland, Ore., for "methods and apparatus for providing integrity protection for management and control traffic of wireless communication networks." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Embodiments of the present invention provide a method comprising transmitting, by a communication node, an information element (IE), the IE including a feature field indicating whether the communication node operates in accordance with an integrity protection protocol specifically for management frames, and the IE further including an enforcement field that advertises whether the integrity protection protocol for management and control frames is mandatory, and generating, by the communication node, a pairwise transient key (PTK), the PTK including a first plurality of keys and a pairwise integrity key (PIK), wherein the first plurality of keys are configured to protect an integrity of data frames transmitted by the communication node and the PIK is configured to protect an integrity of management frames transmitted by the communication node, wherein management frames are dedicated to management traffic and wherein the first plurality of keys and the PIK are different keys. Other embodiments may be described and claimed." The patent application was filed on Aug. 27, 2009 (12/583,953). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,010,780.PN.&OS=PN/8,010,780&RS=PN/8,010,780 Written by Kusum Sangma; edited by Anand Kumar. *** Intel Assigned Patent for Memory Micro-tiling ALEXANDRIA, Va., Aug. 31 -- Intel, Santa Clara, Calif., has been assigned a patent (8,010,754) developed by James Akiyama, Beaverton, Ore., Randy B. Osborne, Beaverton, Ore., and William H. Clifford, Gig Harbor, Wash., for a memory micro-tiling. The abstract of the patent published by the U.S. Patent and Trademark Office states: "According to one embodiment, a memory controller is disclosed. The memory controller includes assignment logic and a transaction assembler. The assignment logic receives a request to access a memory channel. The transaction assembler combines the request into one or more additional requests to access two or more independently addressable subchannels within the channel." The patent application was filed on Jan. 20, 2010 (12/690,551). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8010754.PN.&OS=PN/8010754&RS=PN/8010754 Written by Kusum Sangma; edited by Anand Kumar. *** Crossbeam Systems Assigned Patent ALEXANDRIA, Va., Aug. 31 -- Crossbeam Systems, Boxborough, Mass., has assigned a patent (8,010,469) developed by 10 co-inventors for "systems and methods for processing data flows." The co-inventors are Harsh Kapoor, Boxborough, Mass., Moisey Akerman, Upton, Mass., Stephen D. Justus, Portland, Ore., J.C. Ferguson, Harvard, Mass., Yevgeny Korsunsky, Bedford, Mass., Paul S. Gallo, Newton, Mass., Charles Ching Lee, Ashland, Mass., Timothy M. Martin, Westford, Mass., Chunsheng Fu, Amesbury, Mass., and Weidong Xu, Westford, Mass. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods and systems for flow processing and switching, security, and other network applications, including a facility that processes a data flow to address patterns relevant to a variety of conditions are directed at internal network security, virtualization, and web connection security are described. Such flow processing facilities may be used for inspecting network traffic packet payloads to detect security threats and intrusions across accessible layers of the network IP stack by applying content matching and behavioral anomaly detection techniques based on regular expression matching and self-organizing maps. Exposing threats and intrusions within packet payload at or near real-time rates enhances network security from both external and internal sources while ensuring security policy is rigorously applied to data and system resources." The patent application was filed on Oct. 29, 2007 (11/926,292). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,010,469.PN.&OS=PN/8,010,469&RS=PN/8,010,469 Written by Anjali Jha; edited by Jaya Anand. For more information about Targeted News Service products and services, please contact: Myron Struck, editor, Targeted News Service LLC, Springfield, Va., 703/304-1897; [email protected]; http://targetednews.com. -1059433 (c) 2011 Targeted News Service |