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U.S. Patents Awarded to Inventors in Texas (July 20)(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., July 20 -- The following federal patents were awarded to inventors in Texas. *** Texas Inventor Develops Patent for Plant Support ALEXANDRIA, Va., July 19 -- Antonio S. Bugio, Katy, Texas, has been issued a patent (D641,567) for an ornamental design for a plant support. The patent application was filed on Dec. 7, 2010 (D/380,562). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D641,567.PN.&OS=PN/D641,567&RS=PN/D641,567 Written by Arpi Sharma; edited by Jaya Anand. *** Silicon Laboratories Assigned Patent ALEXANDRIA, Va., July 19 -- Silicon Laboratories, Austin, Texas, has been assigned a patent (7,984,516) developed by David P. Bresemann, Austin, Texas, for a "method and apparatus for protection of voice over internet protocol software." The abstract of the patent published by the U.S. Patent and Trademark Office states: "In one embodiment, the present invention includes a method for executing an application to perform voice over Internet protocol (VoIP) telephony, requesting a hardware key from a line interface device, comparing the hardware key to a software key associated with the application, and enabling the VoIP telephony if the keys match." The patent application was filed on Aug. 31, 2006 (11/514,050). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,984,516.PN.&OS=PN/7,984,516&RS=PN/7,984,516 Written by Arpi Sharma; edited by Jaya Anand. *** Texas Inventor Develops Patent for Plant Support ALEXANDRIA, Va., July 19 -- Antonio S. Bugio, Katy, Texas, has been issued a patent (D641,568) for an ornamental design for a plant support. The patent application was filed on Dec. 7, 2010 (D/380,563). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D641,568.PN.&OS=PN/D641,568&RS=PN/D641,568 Written by Arpi Sharma; edited by Jaya Anand. *** Baker Hughes Assigned Patent ALEXANDRIA, Va., July 19 -- Baker Hughes, Houston, has been assigned a patent (7,980,265) developed by Kevin C. Holmes, Houston, and Sean L. Gaudette, Katy, Texas, for a "valve responsive to fluid properties." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A valve for downhole use has the ability to throttle between fully open and closed and is fully variable in positions in between. The valve is preferably responsive to flowing fluid viscosity and uses a three dimensional flow through restrictor in combination with a relatively movable cover. At a given flow, a higher viscosity fluid will create a greater relative movement and make it possible for flowing fluid to bypass more of the flow through member. In a particular application involving production from a zone, an array of such valves can allow more production where the viscosity is higher and less production where the viscosity drops due to, for example, water production." The patent application was filed on Dec. 6, 2007 (11/951,550). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,980,265&OS=7,980,265&RS=7,980,265 Written by Arpi Sharma; edited by Jaya Anand. *** Robert Bosch Assigned Patent ALEXANDRIA, Va., July 19 -- Robert Bosch, Stuttgart, Germany, has been assigned a patent (7,980,269) developed by four co-inventors for a "control valve assembly for load carrying vehicles." The co-inventors are Lawrence J. Fry, Lexington, Ky., Joseph W. Lehmann, Atlanta, Michael P. Haskin, Georgetown, Texas, and Gregory W. Peterson, Nicholasville, Ky. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A control valve assembly for a load carrying vehicle that includes a storage space and a dumping mechanism that is movable between an open position that allows access to the storage space and a closed position that inhibits access to the storage space. The control valve assembly includes a housing and a valve that is positioned within the housing and is movable between a first position, wherein the dumping mechanism is moved toward the open position, and a second position, wherein the dumping mechanism is moved toward the closed position. First, second, and third actuation systems are in communication with the valve and are operable to actuate the valve between the first position and the second position." The patent application was filed on Dec. 3, 2008 (12/327,291). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,980,269&OS=7,980,269&RS=7,980,269 Written by Arpi Sharma; edited by Jaya Anand. *** QUALCOMM Assigned Patent ALEXANDRIA, Va., July 20 -- QUALCOMM, San Diego, has been assigned a patent (7,984,281) developed by five co-inventors for a "shared interrupt controller for a multi-threaded processor." The co-inventors are Erich James Plondke, Austin, Texas, Lucian Codrescu, Austin, Texas, Muhammad Ahmed, Dallas, William Anderson, Austin, Texas, and Suresh K. Venkumahanti, Austin, Texas. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A multi-threaded processor is disclosed that includes a sequencer adapted to provide instructions associated with one or more threads of a multi-threaded processor. The sequencer includes an interrupt controller adapted to receive one or more interrupts and to selectively allow a first thread of the one or more threads to service at least one interrupt. The interrupt controller includes logic to preclude a second thread of the one or more threads from responding to the at least one interrupt." The patent application was filed on Dec. 12, 2007 (11/954,615). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,281.PN.&OS=PN/79,84,281&RS=PN/79,84,281 Written by Ruby Maibam; edited by Jaya Anand. *** International Business Machines Assigned Patent ALEXANDRIA, Va., July 20 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,984,280) developed by four co-inventors for "storing branch information in an address table of a processor." The co-inventors are Brian R. Konigsburg, Austin, Texas, David Stephen Levitan, Austin, Texas, Wolfram M. Sauer, Nufringen, Germany, and Samuel Jonathan Thomas, Austin, Texas. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods for storing branch information in an address table of a processor are disclosed. A processor of the disclosed embodiments may generally include an instruction fetch unit connected to an instruction cache, a branch execution unit, and an address table being connected to the instruction fetch unit and the branch execution unit. The address table may generally be adapted to store a plurality of entries with each entry of the address table being adapted to store a base address and a base instruction tag. In a further embodiment, the branch execution unit may be adapted to determine the address of a branch instruction having an instruction tag based on the base address and the base instruction tag of an entry of the address table associated with the instruction tag. In some embodiments, the address table may further be adapted to store branch information." The patent application was filed on July 11, 2008 (12/171,370). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,280.PN.&OS=PN/79,84,280&RS=PN/79,84,280 Written by Ruby Maibam; edited by Jaya Anand. *** International Business Machines Assigned Patent for Message Passing Module in Hybrid Computing System Starting ALEXANDRIA, Va., July 20 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,984,267) developed by five co-inventors for a "message passing module in hybrid computing system starting and sending operation information to service program for accelerator to execute application program." The co-inventors are Michael E. Aho, Rochester, Minn., Ricardo M. Matinata, Campinas, Brazil, Amir F. Sanjar, Austin, Texas, Gordon G. Stewart, Rochester, Minn., and Cornell G. Wright Jr., Los Alamos, N.M. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Executing a service program for an accelerator application program in a hybrid computing environment that includes a host computer and an accelerator, the host computer and the accelerator adapted to one another for data communications by a system level message passing module; where the service program includes a host portion and an accelerator portion and executing a service program for an accelerator includes receiving, from the host portion, operating information for the accelerator portion; starting the accelerator portion on the accelerator; providing, to the accelerator portion, operating information for the accelerator application program; establishing direct data communications between the host portion and the accelerator portion; and, responsive to an instruction communicated directly from the host portion, executing the accelerator application program." The patent application was filed on Sept. 4, 2008 (12/204,352). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,267.PN.&OS=PN/79,84,267&RS=PN/79,84,267 Written by Ruby Maibam; edited by Jaya Anand. *** Intel, Forsyth, Abrash Assigned Patent ALEXANDRIA, Va., July 20 -- Intel, Santa Clara, Calif., Tom Forsyth, Kirkland, Wash., and Michael Abrash, Kirkland, Wash., have been assigned a patent (7,984,273) developed by five co-inventors for a "system and method for using a mask register to track progress of gathering elements from memory." The co-inventors are Eric Sprangle, Austin, Texas, Anwar Rohillah, Austin, Texas, Robert Cavin, San Francisco, Tom Forsyth, Kirkland, Wash., and Michael Abrash, Kirkland, Wash. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method for assigning values to elements in a first register, where each data field in a first register corresponds to a data element to be written into a second register, and where for each data field in the first register, a first value may indicate that the corresponding data element has not been written into the second register and a second value indicates that the corresponding data element has been written into the second register, reading the values of each of the data fields in the first register, and for each data field in the first register having the first value, gathering the corresponding data element and writing the corresponding data element into the second register, and changing the value of the data field in the first register from the first value to the second value. Other embodiments are described and claimed." The patent application was filed on Dec. 31, 2007 (11/967,482). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,273.PN.&OS=PN/79,84,273&RS=PN/79,84,273 Written by Ruby Maibam; edited by Jaya Anand. *** Hewlett-Packard Development Assigned Patent for Enhanced CPU RASUM Feature in ISS Servers ALEXANDRIA, Va., July 20 -- Hewlett-Packard Development, Houston, has been assigned a patent (7,984,219) developed by Vincent Nguyen Houston, Kevin Depew, Kingwood, Texas, and John D. Nguyen, Cypress, Texas, for an "enhanced CPU RASUM feature in ISS servers." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Generally, in accordance with embodiments of the present invention, a system having a north bridge and two or more Front Side Buses (FSBs) coupled to the north bridge is provided. The first front side bus has at least a first central processing unit coupled thereto. The second front side bus has at least a second central processing unit coupled thereto." The patent application was filed on Aug. 8, 2005 (11/199,523). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,219.PN.&OS=PN/79,84,219&RS=PN/79,84,219 Written by Ruby Maibam; edited by Jaya Anand. *** Crossroads Systems Assigned Patent for Storage Router and Method for Providing Virtual Local Storage ALEXANDRIA, Va., July 20 -- Crossroads Systems, Austin, Texas, has been assigned a patent (7,984,221) developed by Geoffrey B. Hoese, Austin, Texas, and Jeffry T. Russell, Cibolo, Texas, for a "storage router and method for providing virtual local storage." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A storage router (56) and storage network (50) provide virtual local storage on remote SCSI storage devices (60, 62, 64) to Fibre Channel devices. A plurality of Fibre Channel devices, such as workstations (58), are connected to a Fibre Channel transport medium (52), and a plurality of SCSI storage devices (60, 62, 64) are connected to a SCSI bus transport medium (54) The storage router (56) interfaces between the Fibre Channel transport medium (52) and the SCSI bus transport medium (54). The storage router (56) maps between the workstations (58) and the SCSI storage devices (60, 62, 64) and implements access controls for storage space on the SCSI storage devices (60, 62, 64). The storage router (56) then allows access from the workstations (58) to the SCSI storage devices (60, 62, 64) using native low level, block protocol in accordance with the mapping and the access controls." The patent application was filed on Nov. 29, 2007 (11/947,499). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,221.PN.&OS=PN/79,84,221&RS=PN/79,84,221 Written by Ruby Maibam; edited by Jaya Anand. *** Hewlett-Packard Development Assigned Patent ALEXANDRIA, Va., July 20 -- Hewlett-Packard Development, Houston, has been assigned a patent (7,984,147) developed by Raja Daoud, Santa Clara, Calif., and Francisco J. Romero, Plano, Texas, for an "apparatus and method for identifying a requested level of service for a transaction." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An apparatus for identifying a requested level of service for a transaction wherein the transaction may be processed in accordance with the requested level of service. The invention is preferably embodied in computer readable program code stored in suitable storage media, and comprises, program code for selecting the requested level of service for the transaction, and program code for assigning the requested level of service to the transaction. The transaction is preferably a packetized signal comprising at least a data packet having a service tag associated therewith, wherein the service tag includes the requested level of service. The requested level of service can be any suitable factors or combination thereof, and can be assigned at any point on the network. The service tag is read from the transaction using suitable program code (e.g., at a load balancer), and based on the requested level of service, the transaction is directed to and processed by a network device that is best able to provide the requested level of service." The patent application was filed on Dec. 29, 2000 (09/751,009). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7984147.PN.&OS=PN/7984147&RS=PN/7984147 Written by Ankresh Ranjan; edited by Jaya Anand. *** International Business Machines Assigned Patent for Autonomic Storage Provisioning to Enhance Storage Virtualization Infrastructure Availability ALEXANDRIA, Va., July 20 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,984,251) developed by four co-inventors for an "autonomic storage provisioning to enhance storage virtualization infrastructure availability." The co-inventors are Carl Phillip Gusler, Austin, Texas, Rick Allen Hamilton II, Charlottesville, Va., James Wesley Seaman, Falls Church, Va., and Timothy Moffett Waters, Hiram, Ga. The abstract of the patent published by the U.S. Patent and Trademark Office states: "The invention is an improvement to a storage virtualization system that enables the system to determine a class of service for potential storage devices and allows a user, administrator, or application to select a minimum class of service for any given type of data. The class of service is based upon factors that reflect a potential storage device's reliability, such as the device type and historical uptime data. In a P2P environment, the class of service also includes additional factors, such as the type of attached processing unit and the type of operating system running the attached processing unit." The patent application was filed on April 6, 2009 (12/419,096). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,251.PN.&OS=PN/79,84,251&RS=PN/79,84,251 Written by Ruby Maibam; edited by Jaya Anand. *** Freescale Semiconductor Assigned Patent ALEXANDRIA, Va., July 20 -- Freescale Semiconductor, Austin, Texas, has been assigned a patent (7,984,229) developed by four co-inventors for a "pipelined tag and information array access with speculative retrieval of tag that corresponds to information access." The co-inventors are Ravindraraj Ramaraju, Round Rock, Texas, Ambica Ashok, Austin, Texas, David R. Bearden, Austin, Texas, and Prashant U. Kenkare, Austin, Texas. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A cache design is described in which corresponding accesses to tag and information arrays are phased in time, and in which tags are retrieved (typically speculatively) from a tag array without benefit of an effective address calculation subsequently used for a corresponding retrieval from an information array. In some exploitations, such a design may allow cycle times (and throughput) of a memory subsystem to more closely match demands of some processor and computation system architectures. Our techniques seek to allow early (indeed speculative) retrieval from the tag array without delays that would otherwise be associated with calculation of an effective address eventually employed for a corresponding retrieval from the information array. Speculation can be resolved using the eventually calculated effective address or using separate functionality. In some embodiments, we use calculated effective addresses for way selection based on tags retrieved from the tag array." The patent application was filed on March 9, 2007 (11/684,529). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,229.PN.&OS=PN/79,84,229&RS=PN/79,84,229 Written by Ruby Maibam; edited by Jaya Anand. *** International Business Machines Assigned Patent for Data Processing System and Method in which a Participant Initiating a Read Operation Protects Data Integrity ALEXANDRIA, Va., July 20 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,984,256) developed by four co-inventors for a "data processing system and method in which a participant initiating a read operation protects data integrity." The co-inventors are James S. Fields Jr., Austin, Texas, Guy L. Guthrie, Austin, Texas, John T. Hollaway Jr., Austin, Texas, and Derek E. Williams, Austin, Texas. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A data processing system includes a plurality of requestors and a memory controller for a system memory. In response to receiving from the requestor a read-type request targeting a memory block in the system memory, the memory controller protects the memory block from modification, and in response to an indication that the memory controller is responsible for servicing the read-type request, the memory controller transmits the memory block to the requestor. Prior to receipt of the memory block by the requestor, the memory controller ends protection of the memory block from modification, and the requestor begins protection of the memory block from modification. In response to receipt of the memory block, the requestor ends its protection of the memory block from modification." The patent application was filed on Oct. 13, 2005 (11/250,022). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,256.PN.&OS=PN/79,84,256&RS=PN/79,84,256 Written by Ruby Maibam; edited by Jaya Anand. *** Crossroads Systems Assigned Patent ALEXANDRIA, Va., July 20 -- Crossroads Systems, Austin, Texas, has been assigned a patent (7,984,224) developed by Geoffrey B. Hoese, Austin, Texas, and Jeffry T. Russell, Cibolo, Texas, for a "storage router and method for providing virtual local storage." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A storage router and method for providing virtual local storage on remote storage devices to devices are provided. Devices are connected to a first transport medium, and a plurality of storage devices are connected to a second transport medium. In one embodiment, the storage router maintains a map to allocate storage space of the discovered storage devices to devices connected to the first transport medium by associating representations of the devices connected to the first transport medium with representations of the storage space and controls access from the devices connected to the first transport medium to the discovered storage devices in accordance with the map and using native low level block protocols." The patent application was filed on Oct. 22, 2010 (12/910,431). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,224.PN.&OS=PN/79,84,224&RS=PN/79,84,224 Written by Ruby Maibam; edited by Jaya Anand. *** International Business Machines Assigned Patent ALEXANDRIA, Va., July 20 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,984,142) developed by Rhonda L. Childress, Austin, Texas, David Bruce Kumhyr, Austin, Texas, and Neil Raymond Pennell, Cedar Creek, Texas, for a "method for multidimensional visual correlation of systems management data displaying orchestration action threshold." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method, apparatus, and computer program product for monitoring the performance of a system. The mechanism of the present invention provides an interface in the form of a graphical user interface (GUI) to communicate multiple layers of system performance data to an operator. An operator monitors this display of information and uses it to determine how to adjust the system to optimize system performance. This mechanism of the present invention provides immediate feedback to an operator by displaying a trail of metric points, wherein the metric points indicate the status of system performance over a period of time. In this manner, the display mechanism of the present invention immediately conveys to an operator whether the system is operating within predefined margins, the results of performance adjustments made to the system, as well as predictions or trends for the system." The patent application was filed on March 28, 2008 (12/058,174). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7984142.PN.&OS=PN/7984142&RS=PN/7984142 Written by Ankresh Ranjan; edited by Jaya Anand. *** International Business Machines Assigned Patent for Structure for a Memory-centric Page Table Walker ALEXANDRIA, Va., July 20 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,984,263) developed by Sumedh W. Sathaye, Austin, Texas, and Gordon T. Davis, Chapel Hill, N.C., for a "structure for a memory-centric page table walker." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A design structure embodied in a machine readable storage medium for at least one of designing, manufacturing, and testing a design is provided. The design structure includes a page table walker. The page table walker is moved from its conventional location in the memory management unit associated with the data processor to a location in main memory i.e. the main memory controller. As a result, wherein the processing of requests for data could selectively avoid or bypass cumbersome caches associated with the data processor." The patent application was filed on April 25, 2008 (12/109,671). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,263.PN.&OS=PN/79,84,263&RS=PN/79,84,263 Written by Ruby Maibam; edited by Jaya Anand. *** AT&T Intellectual Property Assigned Patent ALEXANDRIA, Va., July 20 -- AT&T Intellectual Property, Atlanta, has been assigned a patent (7,984,477) developed by Dinesh Nadarajah, Austin, Texas, and Brad A. Medford, Austin, Texas, for a real-time video compression. The abstract of the patent published by the U.S. Patent and Trademark Office states: "There are provided a method, a system and machine-readable medium for encoding a video broadcast. The method includes obtaining one or more first compression settings for the video broadcast from an electronic program guide (EPG), the EPG associating the video broadcast with the one or more first compression settings. The method further includes compressing the video broadcast using the one or more first compression settings into a distribution broadcast. Yet further, the method includes distributing the distribution broadcast. There is also provided a method, system and machine readable medium to provide compression settings for encoding a video broadcast. The method includes inserting one or more compression settings into an electronic program guide (EPG) in association with the video broadcast based on a content type of the video broadcast. The method further includes distributing the EPG." The patent application was filed on March 16, 2007 (11/724,809). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,477&OS=79,84,477&RS=79,84,477 Written by Rajat Puri; edited by Jaya Anand. *** Oracle America Assigned Patent ALEXANDRIA, Va., July 20 -- Oracle America, Redwood City, Calif., has been assigned a patent (7,984,482) developed by Philip Cannata, Austin, Texas, Michael P. Dugan, Austin, Texas, and Andrew Coulbeck, Austin, Texas, for a "global account lockout (GAL) and expiration using an ordered message service (OMS)." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method, apparatus and computer program product for providing Global Account Lockout (GAL) using an Ordered Messaging Service (OMS) is presented. A database operation is received from a client, and a determination made regarding whether the operation contains an authentication mechanism. When the operation does not contain an authentication mechanism then the operation is returned from. When the operation does contain an authentication mechanism then the following steps are performed: locating the entry and checking its authentication mechanism, determining whether the authentication mechanism in the operation is good, sending a bind message to a GAL manager, checking and updating GAL state, committing updates to GAL state, and returning operation to the client." The patent application was filed on Dec. 16, 2005 (11/303,640). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,482&OS=79,84,482&RS=79,84,482 Written by Rajat Puri; edited by Jaya Anand. *** Quartics Assigned Patent ALEXANDRIA, Va., July 20 -- Quartics, Irvine, Calif., has been assigned a patent (7,984,474) developed by Sherjil Ahmed, Irvine, Calif., and Imtinan Elahi, Richardson, Texas, for a "method and apparatus for a digitized CATV network for bundled services." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A cost-efficient digital CATV network to improve signal quality, provide reliability, and offer the ability to meet demands for interactive services is described. Analog or digital video downstream channels are converted to a digital format by a digital headend transmitter. Relatively costly error-encoding for digital video channels is also part of the digital headend transmitter. Downstream analog and digital video channels in the digital format are transmitted using time-division multiplex technology from a headend to nodes using standard network protocols, such as SONET. Standard network protocols provide error-monitoring and status indication of transmit data, thus ensuring high signal quality and reliability. Time-division multiplexing facilitates easy adding or dropping of information to a transmit path. Flexibility to add or drop information is critical in providing interactive services. Data from interactive services can be added or dropped at points of presence throughout the digital CATV network. Subscribers to the digital CATV network can communicate with each other. A digital node transmitter receives the analog or digital video channels in digital format and converts the analog or digital video channels into an analog format. The digital node transmitter also frequency-division multiplexes multiple analog or digital video channels into one analog broadband signal for broadcast to subscribers' homes." The patent application was filed on Dec. 9, 2002 (10/314,873). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,474&OS=79,84,474&RS=79,84,474 Written by Rajat Puri; edited by Jaya Anand. *** Invensys Systems Assigned Patent ALEXANDRIA, Va., July 20 -- Invensys Systems, Foxboro, Mass., has been assigned a patent (7,984,420) developed by eight co-inventors for "control systems and methods with composite blocks." The co-inventors are Keith Eldridge, North Easton, Mass., Brian Mackay, Coppell, Texas, Mark Johnson, North Attleboro, Mass., Scott Volk, North Easton, Mass., Kenneth A. Burke, South Easton, Mass., Paul Meskonis, Norwood, Mass., Robert Hall, South Easton, Mass., and Steven Dardinski, Westford, Mass. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods and apparatus for configuring process, environmental, industrial and other control systems generate and/or utilize models representing configurations of control systems and/or the systems controlled by them. Records of changes to the models or the configurations represented by them are maintained, thereby, for example, providing bases for determining current states, prior states and histories of changes. Objects in the model have characteristics, such as an object type characteristic and an area characteristic. Users can have corresponding permissions. A security mechanism apparatus controls access by users to the objects. Composite objects are defined by definition objects and are displayed in encapsulated or expanded formats. Objects can include an edit control type identifier that determines how they are presented for editing. Functionality responds to user commands by transferring characteristics of a first object depicted by the graphical user interface to a second object. Configuration-time formulas contained objects are evaluated to constants prior to downloading to the control system." The patent application was filed on Nov. 5, 2008 (12/265,506). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,420.PN.&OS=PN/79,84,420&RS=PN/79,84,420 Written by Rajat Puri; edited by Jaya Anand. *** National Instruments Assigned Patent ALEXANDRIA, Va., July 20 -- National Instruments, Austin, Texas, has been assigned a patent (7,984,423) developed by Jeffrey L. Kodosky, Austin, Texas, Darshan Shah, Round Rock, Texas, and Steven W. Rogers, Austin, Texas, for a "configuration diagram which displays a configuration of a system." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method for creating and using configuration diagrams for configuring distributed systems. The methods described herein may be used for various types of operations in configuring distributed systems, including creating programs, managing programs in the distributed system, deploying programs to various distributed devices, configuring remote execution or inter-operation of distributed programs, and executing distributed applications. Embodiments of the invention utilize graphical iconic-based techniques for performing the above operations. The configuration diagram may include device icons which represent devices and program icons which represent programs. Device icons and program icons may be associated with each other to accomplish various program creation and deployment operations. Device icons and program icons may also interact with graphical program nodes or icons. Context sensitive device connections and/or program connections are displayed. An asynchronous data flow node may be used to facilitate asynchronous data flow between two graphical programs. The distributed system may also support distributed graphical debugging." The patent application was filed on April 1, 2002 (10/113,987). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,423.PN.&OS=PN/79,84,423&RS=PN/79,84,423 Written by Rajat Puri; edited by Jaya Anand. *** International Business Machines Assigned Patent for System and Methods for Synchronizing Software Execution Across Data Processing Systems and Platforms ALEXANDRIA, Va., July 20 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,984,427) developed by Jeffrey O. Fisher, Austin, Texas, for "system and methods for synchronizing software execution across data processing systems and platforms." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Systems and methods for software automation are provided. Software testcases are distributed across multiple data processing systems (equivalently, "machines" or "hosts") that may collectively include multiple platforms (equivalently, "operating systems"). A testcase may be executed as one or more processes progressing through a sequence of phases, with execution within a phase being asynchronous among processes. Synchronization of the testcase processes across the data processing systems and platforms may be effected by managing an event; the testcase processes block on the event upon completion of the current testcase phase. A testcase phase execution service on each host handles synchronization events. The definition of the testcase may include metadata that identifies the particular phases in sequence, that is phase names, for the testcase; the phase names identifies the phases to the synchronization process that triggers the synchronization events which initiate each succeeding phase of the testcase." The patent application was filed on Aug. 7, 2003 (10/636,985). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,427.PN.&OS=PN/79,84,427&RS=PN/79,84,427 Written by Rajat Puri; edited by Jaya Anand. *** International Business Machines Assigned Patent for Migration of Single Root Stateless Virtual Functions ALEXANDRIA, Va., July 20 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,984,454) developed by five co-inventors for a "migration of single root stateless virtual functions." The co-inventors are Douglas M. Freimuth, New York, Renato J. Recio, Austin, Texas, Claudia A. Salzberg, Austin, Texas, Steven M. Thurber, Austin, Texas, and Jacobo A. Vargas, Cedar Park, Texas. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Mechanisms for migration of single root stateless virtual functions are provided. A Single-Root PCI Configuration Manager (SR-PCIM) provides a system image (SI) with possible virtual function (VF) migration scenarios supported by the endpoint (EP). The SR-PCIM may be instructed that a stateless migration of a VF and its associated application(s) from one SI to another is required. Outstanding requests to the VF are completed and any applications associated with the VF are removed from the SI and the VF is detached from its associated physical function (PF). The SWI may then attach the VF to a target PF which may be in the same or a different EP. The SWI makes the VF available to the SI with which the VF is now associated and the SI configures the VF thereby making it available for use by associated applications." The patent application was filed on Dec. 19, 2006 (11/612,538). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,454&OS=79,84,454&RS=79,84,454 Written by Rajat Puri; edited by Jaya Anand. *** Cadence Design Systems Assigned Patent for Method for Checking a Status of a Signal Port to Identify an Over-constrained Event ALEXANDRIA, Va., July 20 -- Cadence Design Systems, San Jose, Calif., has been assigned a patent (7,984,401) developed by five co-inventors for a "method for checking a status of a signal port to identify an over-constrained event." The co-inventors are Amir Lehavot, San Francisco, Vinaya Kumar Singh, Noida, India, Joezac John Zachariah, Noida, India, Jose Barandiaran, Austin, Texas, and Axel Siegfried Scherer, Salem, Mass. The abstract of the patent published by the U.S. Patent and Trademark Office states: "An automated debugging method and system for over-constrained circuit verification environment are described. Useful information related to circuit evaluation and/or over-constrained event is collected and provided. The information may include: clock cycles at which an over-constrained event occurs; identification of a minimum subset of constraints that will cause an over-constrained event to occur; signal ports having an associated signal that can not switch between different signal states; whether a triggering signal event has occurred during the evaluation; indicating whether constraints in the evaluation are realizable, etc. Novel approaches for detecting and obtaining the useful information also are described." The patent application was filed on Oct. 31, 2008 (12/263,351). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,401&OS=79,84,401&RS=79,84,401 Written by Rajat Puri; edited by Jaya Anand. *** Texas Instruments Assigned Patent ALEXANDRIA, Va., July 20 -- Texas Instruments, Dallas, has been assigned a patent (7,984,393) developed by Thomas J. Aton, Dallas, and Carl A. Vickery, Garland, Texas, for a "system and method for making photomasks." The abstract of the patent published by the U.S. Patent and Trademark Office states: "The present disclosure is directed a method for preparing photomask patterns. The method comprises receiving drawn pattern data for a design database, the drawn pattern data describing device circuit features and dummy features. The dummy features have first target patterns. Mask pattern data is generated for the dummy features, wherein one or more of the dummy features have second target patterns that are different from the first target patterns. The mask pattern data is corrected for proximity effects." The patent application was filed on Nov. 14, 2007 (11/940,016). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,84,393&OS=79,84,393&RS=79,84,393 Written by Rajat Puri; edited by Jaya Anand. *** Samsung Electronics Assigned Patent ALEXANDRIA, Va., July 20 -- Samsung Electronics, Suwon-si, South Korea, has been assigned a patent (7,984,368) developed by Eran Pisek, Plano, Texas, and Yan Wang, Plano, Texas, for a "method and system for increasing decoder throughput." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for increasing decoder throughput is provided that includes dividing a data block into a plurality of segments. For each of the segments, the segment is decoded by performing a plurality of processes for the segment. At least one process for a current segment is performed while at least one process for a preceding segment is performed. Also, at least one process for the current segment is performed while at least one process for a subsequent segment is performed." The patent application was filed on March 1, 2007 (11/712,653). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,984,368.PN.&OS=PN/7,984,368&RS=PN/7,984,368 Written by Anjali Jha; edited by Jaya Anand. *** Texas Instruments Assigned Patent ALEXANDRIA, Va., July 20 -- Texas Instruments, Dallas, has been assigned a patent (7,984,352) developed by Karl F. Greb, Missouri City, Texas, for "saving debugging contexts with periodic built-in self-test execution." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system comprises built-in self-test (BIST) logic configured to perform a BIST, processing logic coupled to the BIST logic and storage logic coupled to the processing logic. The storage logic comprises debug context information associated with a debugging session. Prior to performance of the BIST, the processing logic stores the debug context information to a destination. After performance of the BIST, the processing logic is reset, and the processing logic restores the debug context information from the destination to the storage logic." The patent application was filed on Dec. 31, 2008 (12/347,825). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,984,352.PN.&OS=PN/7,984,352&RS=PN/7,984,352 Written by Anjali Jha; edited by Jaya Anand. *** Texas Instruments Assigned Patent for IC Multiplexer Control Circuitry for Tap Selection Circuitry ALEXANDRIA, Va., July 20 -- Texas Instruments, Dallas, has been assigned a patent (7,984,349) developed by Lee D. Whetsel, Parker, Texas, for an "IC multiplexer control circuitry for tap selection circuitry." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Today many instances of IEEE 1149.1 Tap domains are included in integrated circuits (ICs). While all TAP domains may be serially connected on a scan path that is accessible external to the IC, it is generally preferred to have selectivity on which Tap domain or Tap domains are accessed. Therefore Tap domain selection circuitry may be included in ICs and placed in the scan path along with the Tap domains. Ideally, the Tap domain selection circuitry should only be present in the scan path when it is necessary to modify which Tap domains are selected in the scan path. The present disclosure describes a novel method and apparatus which allows the Tap domain selection circuitry to be removed from the scan path after it has been used to select Tap domains and to be replaced back into the scan path when it is necessary to select different Tap domains." The patent application was filed on July 13, 2010 (12/835,373). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,984,349.PN.&OS=PN/7,984,349&RS=PN/7,984,349 Written by Anjali Jha; edited by Jaya Anand. *** Texas Instruments Assigned Patent for Series Equivalent Scans Across Multiple Scan Topologies ALEXANDRIA, Va., July 20 -- Texas Instruments, Dallas, has been assigned a patent (7,984,348) developed by Gary L. Swoboda, Sugar Land, Texas, for "series equivalent scans across multiple scan topologies." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Performing series equivalent scans spanning a plurality of scan technologies in a complex scan topology may be performed by performing shift operations in the complex scan topology while only one branch of the complex scan topology connectivity is enabled, and performing capture and update operations in parallel while scan topology connectivity of two or more of the plurality of scan technologies is enabled." The patent application was filed on July 29, 2009 (12/511,983). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,984,348.PN.&OS=PN/7,984,348&RS=PN/7,984,348 Written by Anjali Jha; edited by Jaya Anand. *** Texas Instruments Assigned Patent for System and Method for Sharing a Communications Link between Multiple Communications Protocols ALEXANDRIA, Va., July 20 -- Texas Instruments, Dallas, has been assigned a patent (7,984,347) developed by Gary L. Swoboda, Sugar Land, Texas, for a "system and method for sharing a communications link between multiple communications protocols." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method for sharing a communications link between multiple protocols is described that comprises a system comprising a communications interface configured to exchange information with other systems using at least one of a plurality of protocols; a protocol select register that stores a value that selects a protocol from among the plurality of protocols to become an active protocol; and a state machine accessible to the communications interface, the state machine used to control the exchange of information through the communications interface according to the active protocol. The active protocol is used by the communications interface to exchange information while the remaining protocols of the plurality of protocols remain inactive. The state machine sequences through a series of states that cause the communications interface to operate according to the active protocol, and that are designated as inert sequences under the remaining protocols." The patent application was filed on May 12, 2009 (12/464,468). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,984,347.PN.&OS=PN/7,984,347&RS=PN/7,984,347 Written by Anjali Jha; edited by Jaya Anand. *** Texas Inventor Develops Patent for Solid State Disk with Hot-swappable Components ALEXANDRIA, Va., July 20 -- Paul Kaler, Houston, has developed a patent (7,984,316) for a "solid state disk with hot-swappable components." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A solid state disk (SSD) device includes a non-volatile storage module (NVSM), a secondary power source coupled to power inputs of the SSD, a volatile memory (VM), a controller in communication with the NVSM and the VM. The controller is operable in a (re)populate mode to (re)populate data stored in the NVSM to the VM when primary power is initially applied to power inputs of the SSD and further operable in a primary power on mode to replicate data to the NVSM that was written to the VM in response to received I/O requests while primary power is applied to the power inputs of the SSD. The secondary power source can be decoupled from the power inputs of the SSD while the controller is operating in either the (re)populate mode or the primary power on mode." The patent application was filed on Feb. 24, 2005 (11/066,840). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,984,316.PN.&OS=PN/7,984,316&RS=PN/7,984,316 Written by Anjali Jha; edited by Jaya Anand. *** Freescale Semiconductor Assigned Patent ALEXANDRIA, Va., July 20 -- Freescale Semiconductor, Austin, Texas, has been assigned a patent (7,984,337) developed by William C. Moyer, Dripping Springs, Texas, and Richard G. Collins, Austin, Texas, for an "address translation trace message generation for debug." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A data processing system and method generates debug messages by permitting an external debug tool to have real-time trace functionality. A data processor executes a plurality of data processing instructions and uses a memory for information storage. Debug circuitry generates debug messages including address translation trace messages. A memory management unit has address translation logic for implementing address translation to translate addresses between virtual and physical forms. The debug circuitry includes message generation circuitry that is coupled to the memory management unit for receiving notice when one or more address translation mappings are modified. The message generation circuitry generates an address translation trace message in response to a detection of a modification of an address translation mapping occurs and provides the address translation trace message external to the debug circuitry." The patent application was filed on Feb. 19, 2009 (12/389,153). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,984,337.PN.&OS=PN/7,984,337&RS=PN/7,984,337 Written by Anjali Jha; edited by Jaya Anand. *** Dell Products Assigned Patent ALEXANDRIA, Va., July 20 -- Dell Products, Round Rock, Texas, has been assigned a patent (7,984,311) developed by Alan Brumley, Cedar Park, Texas, Michael Brundridge, Georgetown, Texas, and Ashish Munjal, Round Rock, Texas, for a "demand based power allocation." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A demand based power re-allocation system includes one or more subsystems to assign a power allocation level to a plurality of servers, wherein the power allocation level is assigned by priority of the server. The system may throttle power for one or more of the plurality of servers approaching the power allocation level, wherein throttling includes limiting performance of a processor, and track server power throttling for the plurality of servers. The method compares power throttling for a first server with power throttling for remaining servers in the plurality of servers and adjusts throttling of the plurality of servers, wherein throttled servers receive excess power from unthrottled servers." The patent application was filed on Aug. 8, 2008 (12/188,502). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,984,311.PN.&OS=PN/7,984,311&RS=PN/7,984,311 Written by Anjali Jha; edited by Jaya Anand. *** Texas Instruments Assigned Patent for TAM with Scan Frame Copy Register Coupled with Serial Output ALEXANDRIA, Va., July 20 -- Texas Instruments, Dallas, has been assigned a patent (7,984,331) developed by Lee D. Whetsel, Parker, Texas, for a "TAM with scan frame copy register coupled with serial output." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Testing of an electrical device is achieved by providing a test access mechanism within the device that can receive scan frames from an external tester. The received scan frames contain stimulus data to be applied to circuitry within the device to be tested, a command for enabling a test control operation, and a frame marker bit to indicate the end of the scan frame pattern. The inputting of scan frames can occur continuously and simultaneous with a commanded test control operation." The patent application was filed on Dec. 15, 2009 (12/638,498). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,984,331.PN.&OS=PN/7,984,331&RS=PN/7,984,331 Written by Anjali Jha; edited by Jaya Anand. *** International Business Machines Assigned Patent for System and Method for Providing Dram Device-level Repair via Address Remappings ALEXANDRIA, Va., July 20 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,984,329) developed by six co-inventors for a "system and method for providing DRAM device-level repair via address remappings external to the device." The co-inventors are Luis A. Lastras-Montano, Cortlandt Manor, N.Y., Darren L. Anand, Williston, Vt., Jeffrey H. Dreibelbis, Williston, Vt., Charles A. Kilmer, Essex Junction, Vt., Warren E. Maule, Cedar Park, Texas, and Robert B. Tremaine, Stormville, N.Y. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method for providing DRAM device-level repair via address remappings external to the device. A system includes a memory controller having an interface to one or more memory devices via a memory module. The memory devices include addressable redundant and non-redundant memory blocks. The memory controller also includes a mechanism for utilizing one or more redundant memory blocks in place of one or more failing non-redundant memory blocks via an address remapping external to the memory device. The remapping occurs while the system is on-line." The patent application was filed on Sept. 4, 2007 (11/849,452). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,984,329.PN.&OS=PN/7,984,329&RS=PN/7,984,329 Written by Anjali Jha; edited by Jaya Anand. *** Dell Products Assigned Patent for Information Handling System Port Security ALEXANDRIA, Va., July 20 -- Dell Products, Round Rock, Texas, has been assigned a patent (7,984,285) developed by Ardian Darmawan, Round Rock, Texas, Curtis Ray Genz, Round Rock, Texas, and Clay Phennicie, Round Rock, Texas, for an "information handling system port security." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A port securing module includes a power gate that is operable to be coupled in series to a power source and to a load. A resistor is coupled in parallel to the power gate. An operational amplifier includes an inverting input and a non-inverting input that couple the operational amplifier in parallel to each of the power gate and the resistor. The operational amplifier also includes an output that is operable to indicate whether a load is coupled to the power gate and, if a load is coupled to the power gate, supply a voltage to activate the power gate such that power is supplied to the load." The patent application was filed on Feb. 26, 2008 (12/037,458). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,984,285.PN.&OS=PN/7,984,285&RS=PN/7,984,285 Written by Anjali Jha; edited by Jaya Anand. *** Cepia Assigned Patent for Toy Chassis ALEXANDRIA, Va., July 20 -- Cepia, St. Louis, has been assigned a patent (No. D641,806) developed by four co-inventors for an ornamental design for a toy chassis. The co-inventors are James Russell Hornsby, St. Louis, Ashley B. Hornsby, Dallas, Joseph McGowan, St. Charles, Mo., and Michael Reynolds, St. Louis. The abstract of the patent published by the U.S. Patent and Trademark Office states: "The ornamental design for a toy chassis, as shown and described." The patent application was filed on Oct. 16, 2009 (D/345,500). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D641,806&OS=D641,806&RS=D641,806 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Port-a-Cool Assigned Patent for Evaporative Cooler Housing ALEXANDRIA, Va., July 20 -- Port-a-Cool, Center, Texas, has been assigned a patent (No. D641,844) developed by Yun Kim, Chandler, Ariz., and Ben Wulf, Center, Texas, for an ornamental design for an evaporative cooler housing. The abstract of the patent published by the U.S. Patent and Trademark Office states: "The ornamental design for an evaporative cooler housing, as shown and described." The patent application was filed on Aug. 9, 2010 (D/367,485). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D641,844&OS=D641,844&RS=D641,844 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Cepia Assigned Patent ALEXANDRIA, Va., July 20 -- Cepia, St. Louis, has been assigned a patent (No. D641,807) developed by four co-inventors for an ornamental design for a toy play set. The co-inventors are James Russell Hornsby, St. Louis, Ashley B. Hornsby, Dallas, Joseph McGowan, St. Charles, Mo., and Michael Reynolds, St. Louis. The abstract of the patent published by the U.S. Patent and Trademark Office states: "The ornamental design for a toy play set, as shown and described." The patent application was filed on Oct. 16, 2009 (D/345,513). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D641,807&OS=D641,807&RS=D641,807 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Texas Inventor Develops Patent for Golf Tee ALEXANDRIA, Va., July 20 -- Glen Bowen, Kingwood, Texas, has been issued a patent (D641,813) for an ornamental design for a golf tee. The patent application was filed on Aug. 16, 2010 (D/367,979). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D641,813&OS=D641,813&RS=D641,813 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Intel Assigned Patent ALEXANDRIA, Va., July 20 -- Intel, Santa Clara, Calif., has been assigned a patent (7,984,208) developed by five co-inventors for a "method using port task scheduler." The co-inventors are Tracey Gustafson, Hudson, Mass., Pak-Lung Seto, Shrewsbury, Mass., Gary Y. Tsao, Austin, Texas, Nai-Chih Chang, Shrewbury, Mass., and Victor Lau, Marlboro, Mass. The abstract of the patent published by the U.S. Patent and Trademark Office states: "According to one embodiment, an apparatus is disclosed. The apparatus includes a port having a plurality of lanes, a plurality of protocol engines. Each protocol engine is associated with one of the plurality of lanes, and processes tasks to be forwarded to a plurality of remote nodes. The apparatus also includes a first port task scheduler (PTS) to manage the tasks to be forwarded to the one or more of the plurality of protocol engines. The first PTS includes a register to indicate which of the plurality of protocol engines the first PTS is to support." The patent application was filed on Nov. 10, 2008 (12/268,026). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7,984,208.PN.&OS=PN/7,984,208&RS=PN/7,984,208 Written by Shabnam Sheikh; edited by Jaya Anand. *** VIXS Systems Assigned Patent ALEXANDRIA, Va., July 20 -- VIXS Systems, Toronto, has been assigned a patent (7,984,177) developed by James Ward Girardeau Jr., Austin, Texas, and SuiWu Dong, Markham, Canada, for a "multimedia client/server system with adjustable packet size and methods for use therewith." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A circuit for use in a multimedia server module includes an encoder module that encodes a multimedia signal to produce an encoded signal that includes a sequence of packets having a packet size. An RF server transceiver module, coupled to the encoder module, that produces a channel signal that includes the encoded signal, and that wirelessly transmits the channel signal at a link data rate over a wireless communication path to at least one client module The RF server transceiver module includes a quality of service module that adjusts the packet size based on first RF performance signals determined by the RF transceiver, based on second performance signals received from a client module and/or based on adjustments made to the link data rate." The patent application was filed on April 30, 2007 (11/799,100). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7,984,177.PN.&OS=PN/7,984,177&RS=PN/7,984,177 Written by Shabnam Sheikh; edited by Jaya Anand. *** Sypris Electronics Assigned Patent ALEXANDRIA, Va., July 20 -- Sypris Electronics, Tampa, Fla., has been assigned a patent (D641,751) developed by Timothy J. Morton, Austin, Texas, Rene E. Menard III, Tampa, Fla., and Christopher A. Torres, San Marcos, Texas, for an ornamental design for a handheld electronic device. The abstract of the patent published by the U.S. Patent and Trademark Office states: "The ornamental design for a handheld electronic device, as shown and described." The patent application was filed on Oct. 5, 2010 (D/376,312). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D641,751.PN.&OS=PN/D641,751&RS=PN/D641,751 Written by Kusum Sangma; edited by Anand Kumar. *** O-I-C it Studios Assigned Patent ALEXANDRIA, Va., July 20 -- O-I-C it Studios, Lewisville, Texas, has been assigned a patent (D641,660) developed by Thomas Shaw Cavness, Georgetown, Texas, for an ornamental design for a ribbon-heart sculpture. The abstract of the patent published by the U.S. Patent and Trademark Office states: "The ornamental design for a ribbon-heart sculpture, as shown and described." The patent application was filed on Nov. 15, 2010 (D/379,122). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D641,660.PN.&OS=PN/D641,660&RS=PN/D641,660 Written by Kusum Sangma; edited by Anand Kumar. For more information about Targeted News Service products and services, please contact: Myron Struck, editor, Targeted News Service LLC, Springfield, Va., 703/304-1897; [email protected]; http://targetednews.com. -1054882 (c) 2011 Targeted News Service |