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U.S. Patents Awarded to Inventors in Oregon (June 15)(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., June 15 -- The following federal patents were awarded to inventors in Oregon. *** Fiskars Brands Assigned Patent ALEXANDRIA, Va., June 14 -- Fiskars Brands, Madison, Wis., has been assigned a patent (D639,632) developed by Jeffrey Freeman, Tigard, Ore., and Darrin Seeds, Vancouver, Wash., for an ornamental design for a knife handle. The abstract of the patent published by the U.S. Patent and Trademark Office states: "We claim the ornamental design for a knife handle, as shown and described." The patent application was filed on Oct. 2, 2009 (D/316,494). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D639,632.PN.&OS=PN/D639,632&RS=PN/D639,632 Written by Rajat Puri; edited by Jaya Anand. *** Fiskars Brand Assigned Patent for Communication Tool ALEXANDRIA, Va., June 14 -- Fiskars Brands, Madison, Wis., has been assigned a patent (D639,627) developed by Darrin Seeds, Vancouver, Wash., John Nason, Keizer, Ore., and Hal Hardinge, Tigard, Ore., for an ornamental design for a communication tool. The abstract of the patent published by the U.S. Patent and Trademark Office states: "We claim the ornamental design for a communication tool, as shown and described." The patent application was filed on May 27, 2010 (D/362,612). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D639,627.PN.&OS=PN/D639,627&RS=PN/D639,627 Written by Rajat Puri; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., June 15 -- Intel, Santa Clara, Calif., has been assigned a patent (7,962,785) developed by four co-inventors for a "method and apparatus to maintain data integrity in disk cache memory during and after periods of cache inaccessibility." The co-inventors are Sanjeev N. Trika, Hillsboro, Ore., Michael K. Eschmann, Lees Summit, Mo., Jeanna N. Matthews, Massena, N.Y., and Vasudevan Srinivasan, Hillsboro, Ore. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A volatile or nonvolatile cache memory can cache mass storage device read data and write data. The cache memory may become inaccessible, and I/O operations may go directly to the mass storage device, bypassing the cache memory. A log of write operations may be maintained to update the cache memory when it becomes available." The patent application was filed on Nov. 18, 2008 (12/272,906). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,62,785.PN.&OS=PN/79,62,785&RS=PN/79,62,785 Written by Ruby Maibam; edited by Jaya Anand. *** Intel Assigned Patent for Method, System, and Apparatus for Rerouting Interrupts in a Multi-core Processor ALEXANDRIA, Va., June 15 -- Intel, Santa Clara, Calif., has been assigned a patent (7,962,771) developed by eight co-inventors for a "method, system, and apparatus for rerouting interrupts in a multi-core processor." The co-inventors are Justin Song, Olympia, Wash., Devadatta V. Bodas, Federal Way, Wash., Ohad Falik, Kfar-Saba, Israel, Alon Naveh, Ramat Hasharon, Israel, Ilan Pardo, Ramat Hasharon, Israel, Anil Aggarwal, Portland, Ore., Sridhar Muthrasanallur, Puyallup, Wash., and James B. Crossland, Banks, Ore. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method, system, and apparatus may route an interrupt to a first core of a plurality of cores of a multi-core system. If the first core is in an idle or low power state, or operating in a power state at or below a threshold power state, a core in a least idle state may be found. The interrupt may be rerouted to and processed by the core in the least idle state. Cores in a multi-core system may be rated based on for example, power states or other characteristics, and interrupts may be assigned based on these ratings. Other embodiments are described and claimed." The patent application was filed on Dec. 31, 2007 (11/967,799). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,62,771.PN.&OS=PN/79,62,771&RS=PN/79,62,771 Written by Ruby Maibam; edited by Jaya Anand. *** Intel Assigned Patent for Method for Providing Trusted Time in a Computing Platform ALEXANDRIA, Va., June 15 -- Intel, Santa Clara, Calif, has been assigned a patent (7,962,752) developed by Ernest F. Brickell, Portland, Ore., and Clifford D. Hall, Orangevale, Calif., for a "method for providing trusted time in a computing platform." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Providing trusted time in a computing platform, while still supporting privacy, may be accomplished by having a trusted time device provide the trusted time to an application executing on the computing platform. The trusted time device may be reset by determining if a value in a trusted time random number register has been set, and if not, waiting a period of time, generating a new random number, and storing the new random number in the trusted time random number register. The trusted time random number register is set to zero whenever electrical power is first applied to the trusted time device upon power up of the computing platform, and whenever a battery powering the trusted time device is removed and reconnected. By keeping the size of the trusted time random number register relatively small, and waiting the specified period of time, attacks on the computing platform to determine the trusted time may be minimized, while deterring the computing platform from being uniquely identified." The patent application was filed on Sept. 23, 2005 (11/233,543). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,62,752.PN.&OS=PN/79,62,752&RS=PN/79,62,752 Written by Ruby Maibam; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., June 15 -- Intel, Santa Clara, Calif., has been assigned a patent (7,962,738) developed by Vincent J. Zimmer, Federal Way, Wash., and Yasser Rasheed, Beaverton, Ore., for a "hypervisor runtime integrity support." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method and system are disclosed. In one embodiment the method includes computing, during runtime, an active hash value of a hypervisor on a computer platform using an authenticated integrity agent. The method also includes comparing the active hash value to a registered hash reference value. The method also includes verifying the integrity of the hypervisor when the active hash value and the registered hash reference value match." The patent application was filed on Dec. 20, 2007 (11/961,470). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7962738.PN.&OS=PN/7962738&RS=PN/7962738 Written by Ankresh Ranjan; edited by Jaya Anand. *** Columbia Sportswear North America Assigned Patent ALEXANDRIA, Va., June 15 -- Columbia Sportswear North America, Portland, Ore., has been assigned a patent (D639,529) developed by Joe Boyle, Portland, Ore., and Andrew Gosse, West Linn, Ore., for an ornamental design for pockets. The abstract of the patent published by the U.S. Patent and Trademark Office states: "The ornamental design for pockets, as shown and described." The patent application was filed on July 22, 2009 (D/340,639). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D639,529.PN.&OS=PN/D639,529&RS=PN/D639,529 Written by Anjali Jha; edited by Jaya Anand. *** Fiskars Brands Assigned Patent ALEXANDRIA, Va., June 15 -- Fiskars Brands, Madison, Wis., has been assigned a patent (D639,549) developed by Jeff Freeman, Tigard, Ore., and Darrin Seeds, Vancouver, Wash., for an ornamental design for a sheath. The abstract of the patent published by the U.S. Patent and Trademark Office states: "We claim the ornamental design for a sheath, as shown and described." The patent application was filed on Aug. 31, 2010 (D/368,954). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D639,549.PN.&OS=PN/D639,549&RS=PN/D639,549 Written by Anjali Jha; edited by Jaya Anand. *** Oregon Inventor Develops Patent for Disposable Bib ALEXANDRIA, Va., June 15 -- Terri Hocker, La Grande, Ore., has been issued a patent (D639,531) for an ornamental design for a disposable bib. The patent application was filed on Oct. 12, 2010 (D/372,052). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D639,531.PN.&OS=PN/D639,531&RS=PN/D639,531 Written by Anjali Jha; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., June 15 -- Intel, Santa Clara, Calif., has been assigned a patent (7,962,921) developed by Tsai James, Beaverton, Ore., and Marc Jalfon, Zichron Yaakov, Ill., for "apparatus and methods using intelligent wake mechanisms." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An embodiment of the present invention provides a network interface card (NIC), comprising an intelligent wake mechanism and a device driver associated with the intelligent wake mechanism and configured to agree with embedded software on a set of wake codes and wake behaviors associated with the wake codes such that when the NIC encounters a wake event, the NIC first adds the wake code to a command queue, then it drives a PME pin to high to wake a device connected to the NIC." The patent application was filed on June 20, 2007 (11/765,997). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,962,921.PN.&OS=PN/7,962,921&RS=PN/7,962,921 Written by Anjali Jha; edited by Jaya Anand. *** Mentor Graphics Assigned Patent ALEXANDRIA, Va., June 15 -- Mentor Graphics, Wilsonville, Ore., has been assigned a patent (7,962,820) developed by five co-inventors for a "fault diagnosis of compressed test responses." The co-inventors are Janusz Rajski, West Linn, Ore., Grzegorz Mrugalski, Wilsonville, Ore., Artur Pogiel, Szubin, Poland, Jerzy Tyszer, Poznan, Poland, and Chen Wang, Tigard, Ore. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods, apparatus, and systems for diagnosing failing scan cells from compressed test responses are disclosed herein. For example, in one nonlimiting exemplary embodiment, at least one error signature comprising multiple bits (including one or more error bits) is received. Plural potential-error-bit-explaining scan cell candidates are evaluated using a search tree. A determination is made as to whether one or more of the evaluated scan cell candidates explain the error bits in the error signature and thereby constitute one or more failing scan cells. An output is provided of any such one or more failing scan cells determined. Tangible computer-readable media comprising computer-executable instructions for causing a computer to perform any of the disclosed methods are also provided. Tangible computer-readable media comprising lists of failing scan cells identified by any of the disclosed methods are also provided." The patent application was filed on March 17, 2009 (12/405,828). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7,962,820.PN.&OS=PN/7,962,820&RS=PN/7,962,820 Written by Shabnam Sheikh; edited by Jaya Anand. *** Synopsys Assigned Patent for Method and System for Debug and Test Using Replicated Logic ALEXANDRIA, Va., June 15 -- Synopsys, Mountain View, Calif., has been assigned a patent (7,962,869) developed by Chun Kit Ng, Portland, Ore., and Mario Larouche, Portland, Ore., for a "method and system for debug and test using replicated logic." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method and system for debug and test using replicated logic is described. A representation of a circuit is compiled. The circuit includes a replicated portion and delay logic to delay inputs into the replicated portion. The circuit may also include trigger logic and clock control logic to enable execution of the replicated portion of the circuit to be paused when a trigger condition occurs. The compiled representation of the circuit may be programmed into a hardware device. A debugger may then be invoked. One or more triggering signals are selected. For each selected triggering signal, one or more states are selected to setup a trigger condition. The hardware device may then be run. The replicated portion of the circuit will be paused when the trigger condition occurs. The states of registers in the replicated portion of the circuit and the sequence of inputs that led to the trigger condition are recorded. This recorded data may then used to generate a test to be run on a software simulator when the circuit is modified." The patent application was filed on July 1, 2008 (12/166,298). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7,962,869.PN.&OS=PN/7,962,869&RS=PN/7,962,869 Written by Ankita Das; edited by Jaya Anand. *** Oreland Inventors Develops Patent for Wearable Movement Monitor ALEXANDRIA, Va., June 15 -- Pedro Mateo Riobo Aboy, Beaverton, Ore., Andrew Greenberg, Portland, Ore., James McNames, Portland, Ore., and Stephen Dylan Berry, Beaverton, Ore., has been issued a patent (D639,955) for an ornamental design for a wearable movement monitor. The patent application was filed on March 21, 2010 (D/358,003). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D639,955&OS=D639,955&RS=D639,955 Written by Satyaban Rath; edited by Hemanta Panigrahi. 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