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U.S. Patents Awarded to Inventors in Texas (June 15)(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., June 15 -- The following federal patents were awarded to inventors in Texas. *** Texas Inventor Develops Patent for Sleeper Chair with Weave Pattern ALEXANDRIA, Va., June 14 -- Stephen C. Drilling, Southlake, Texas, has been issued a patent (D639,571) for an ornamental design for a "sleeper chair with weave pattern." The patent application was filed on Sept. 15, 2010 (D/369,959). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D639,571&OS=D639,571&RS=D639,571 Written by Rajat Puri; edited by Jaya Anand. *** Texas Inventors Develop Patent for Beach Towel with Built-in Pillow ALEXANDRIA, Va., June 14 -- Christopher Cline Weaver, Pottsboro, Texas, and Suzanne Weaver, Pottsboro, Texas, have been issued a patent (D639,597) for an ornamental design for a "beach towel with built-in pillow." The patent application was filed on April 12, 2010 (D/349,541). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D639,597.PN.&OS=PN/D639,597&RS=PN/D639,597 Written by Rajat Puri; edited by Jaya Anand. *** International Business Machines Assigned Patent ALEXANDRIA, Va., June 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,962,793) developed by Mike C. Duron, Pflugerville, Texas, and Mark D. McLaughlin, Austin, Texas, for a "self-diagnosing remote I/O enclosures with enhanced FRU callouts." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method, apparatus, and computer instructions for self-diagnosing remote I/O enclosures with enhanced FRU callouts. When a failure is detected on a RIO drawer, a data processing system uses the bulk power controller to provide an alternate path, rather than using the existing RIO links, to access registers on the I/O drawers. The system logs onto the bulk power controller, which provides a communications path between the data processing system and the RIO drawer. The communications path allows the data processing system to read all of the registers on the I/O drawer. The register information in the I/O drawer is then analyzed to diagnose the I/O failure. Based on the register information, the data processing system identifies a field replacement unit to repair the I/O failure." The patent application was filed on Oct. 8, 2008 (12/247,812). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,62,793.PN.&OS=PN/79,62,793&RS=PN/79,62,793 Written by Ruby Maibam; edited by Jaya Anand. *** Globalfoundries Assigned Patent ALEXANDRIA, Va., June 15 -- Globalfoundries, Milpitas, Calif., has been assigned a patent (7,962,796) developed by Leon Hong, Austin, Texas, and James T. Lee Jr., Buda, Texas, for a "state testing device and methods thereof." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A test method for a data processing device includes determining both a current state of the device and a desired state of the device. A set of instructions to transition the data processing device from the current state to the target state is obtained by initially selecting a first source state from a set of possible source states and corresponding instructions that can transition the device to the desired state. The instruction associated with the first source state is placed on an instruction stack. The source state and instruction selection process is repeated until the selected source state corresponds to the current state of the device under test. The instructions in the stack are applied to the device under test, and the resulting device state compared to the specified state to determine a test result." The patent application was filed on Nov. 16, 2007 (11/941,311). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,62,796.PN.&OS=PN/79,62,796&RS=PN/79,62,796 Written by Ruby Maibam; edited by Jaya Anand. *** Silicon Laboratories Assigned Patent ALEXANDRIA, Va., June 15 -- Silicon Laboratories, Austin, Texas, has been assigned a patent (7,962,773) developed by Kenneth W. Fernald, Austin, Texas, and Donald E. Alfano, Round Rock, Texas, for a "micro controller unit (MCU) with RTC." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A microcontroller unit (MCU) is disclosed with a stand-alone Real Time Clock (RTC). The MCU includes a processing circuit for receiving digital information and processing said received digital information. A primary clock circuit provides the timing for the processing circuit. A power control circuit controls the power to the processing circuit and the primary clock circuit to control the operation thereof to operate in at least a full power mode drawing a full power level from a supply voltage input and a reduced power mode drawing less than the full power level from the supply voltage input. A stand-alone RTC circuit is also provided, the stand-alone RTC circuit including an RTC clock circuit operating independent of the primary clock circuit. A timer clocked by the RTC clock circuit is operable to increment a stored time value for output therefrom, the RTC clock circuit having a defined time base. An input/output (I/O) device provides access by the processing circuit to the results output by the timer. A power management circuitry manages the power to the stand-alone RTC circuit, such that the RTC clock circuit, the timer, and the I/O device operate regardless of the power mode of operation of the processing circuitry and the primary clock circuit." The patent application was filed on March 11, 2008 (12/046,321). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,62,773.PN.&OS=PN/79,62,773&RS=PN/79,62,773 Written by Ruby Maibam; edited by Jaya Anand. *** International Business Machines Assigned Patent for Dynamic Processor Reconfiguration for Low Power Without Reducing Performance Based on Workload Execution Characteristics ALEXANDRIA, Va., June 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,962,770) developed by Louis B. Capps Jr., Georgetown, Texas, Robert H. Bell Jr., Austin, Texas, and Michael J. Shapiro, Austin, Texas, for a "dynamic processor reconfiguration for low power without reducing performance based on workload execution characteristics." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method, system and program are provided for dynamically reconfiguring a pipelined processor to operate with reduced power consumption without reducing existing performance. By monitoring or detecting the performance of individual units or stages in the processor as they execute a given workload, each stage may use high-performance circuitry until such time as a drop in the throughput performance is detected, at which point the stages are reconfigured to use lower-performance circuitry so as to meet the reduced performance throughput requirements using less power. By configuring the processor to back off from high-performance designs to low-performance designs to meet the detected performance characteristics of the executing workload warrant, power dissipation may be optimized." The patent application was filed on Dec. 19, 2007 (11/960,163). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,62,770.PN.&OS=PN/79,62,770&RS=PN/79,62,770 Written by Ruby Maibam; edited by Jaya Anand. *** Marvell International Assigned Patent ALEXANDRIA, Va., June 15 -- Marvell International, Hamilton, Bermuda, has been assigned a patent (7,962,775) developed by Priya Vaidyu, Shrewsbury, Mass., and Moinul Khan, Austin, Texas, for "methods and apparatus for power mode control for PDA with separate communications and applications processors." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A mobile electronic communication device power management method and apparatus are disclosed for use in multiple processor hardware schemes having asymmetrical power demands between processors. Upon reaching an long duration idle state, a high-level processor with high power consumption requirements handling low-level system tasks updates a data set shared between processor subsystems containing information necessary to perform such low-level tasks. A proxy software module is initiated on a base-band processor with lower power consumption requirements. The proxy module accesses the shared data set and begins to control low-level system tasks, allowing the high-level processor to enter a dormant low power state. Upon the occurrence of a wake-up event, the high-level processor enters an active state. The shared data set is updated by the proxy software module and the proxy module is terminated. The high-level processor accesses the shared data set and resumes control of low-level system tasks." The patent application was filed on Dec. 13, 2007 (11/956,088). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,62,775.PN.&OS=PN/79,62,775&RS=PN/79,62,775 Written by Ruby Maibam; edited by Jaya Anand. *** International Business Machines Assigned Patent for Method and System for Creating a Non-repudiable Chat Log ALEXANDRIA, Va., June 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,962,749) developed by Daniel Horacio Jones, Round Rock, Texas, Thomas Girard Lendacky, Austin, Texas, and Emily Jane Ratliff, Austin, Texas, for a "method and system for creating a non-repudiable chat log." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system for creating a non-reputable chat log. An initial quote is performed of a value of a register in response to a secure chat session being initiated. The value of the register is extended to record a message measurement within the register for the secure chat session in response to a message being measured. A final quote is performed of the value of the register in response to the secure chat session being terminated." The patent application was filed on Oct. 9, 2006 (11/539,791). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,62,749.PN.&OS=PN/79,62,749&RS=PN/79,62,749 Written by Ruby Maibam; edited by Jaya Anand. *** Dell Products Assigned Patent ALEXANDRIA, Va., June 15 -- Dell Products, Round Rock, Texas, has been assigned a patent (7,962,737) developed by Yuan-Chang Lo, Austin, Texas, for "methods, media and apparatus for booting diskless systems." The abstract of the patent published by the U.S. Patent and Trademark Office states: "The disclosure provides a system, method, and computer readable medium for booting a diskless client in an information handling system (IHS). Cached boot data is stored in a non-volatile memory of the diskless client. The diskless client sends a boot request with an identifier and receives a boot reply containing an image signature associated with the identifier. The diskless client determines whether there is a match between a cached image signature and the received image signature. If there is a match, the diskless client boots with the cached boot data. If there is not a match, the cached boot data is invalidated and new boot data is requested and received from a server. The diskless client stores the new boot data in the non-volatile memory and boots with the new boot data. The cached boot data may be update when network traffic is below a predetermined level and/or an administrator change to boot data affects a plurality of diskless clients. The diskless client request and receives updated boot data stores the updated boot data in the non-volatile memory." The patent application was filed on Nov. 21, 2007 (11/944,018). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7962737.PN.&OS=PN/7962737&RS=PN/7962737 Written by Ankresh Ranjan; edited by Jaya Anand. *** International Business Machines Assigned Patent ALEXANDRIA, Va., June 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,962,729) developed by Jose G. Rivera, Austin, Texas, for a "dynamic runtime range checking of different types on a register using upper and lower bound value registers for the register." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Software defects (e.g., array access out of bounds, stack overflow, infinite loops, and data corruption) occur due to integer values falling outside their expected range. Because programming languages do not include range-checking instructions as part of their language, to detect software defects and ensure that the code runs smoothly, programmers generally use 1) runtime assertions and/or 2) sub-range data types. However, these techniques cause additional conditional branches, incur additional overhead, and decrease processor performance. Processors comprising a range checking hardware feature supported by machine instructions for runtime integer range checking can eliminate the conditional branches generated during runtime integer range checks. Programming language extensions for the range checking hardware can allow dynamic range bounds to be defined during runtime without decreasing the processor's performance. This can allow for easier programming and code that is easier to maintain." The patent application was filed on Jan. 5, 2009 (12/348,712). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7962729.PN.&OS=PN/7962729&RS=PN/7962729 Written by Ankresh Ranjan; edited by Jaya Anand. *** Freescale Semiconductor Assigned Patent ALEXANDRIA, Va., June 15 -- Freescale Semiconductor, Austin, Texas, has been assigned a patent (7,962,718) developed by William C. Moyer, Dripping Springs, Texas, for "methods for performing extended table lookups using SIMD vector permutation instructions that support out-of-range index values." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A permutation instruction generates vector elements for a destination register using identified source and destination registers. A plurality of partial table lookups corresponding to an extended table produces a plurality of intermediate results. At least one source register stores a plurality of index values corresponding to the extended table. Out-of-range index values are values that are not contained in at least one additional source register and result in a predetermined constant value being stored into a predetermined vector element of the destination register. The index values are adjusted between the partial table lookups. A final result is formed by performing a logic function with the plurality of intermediate results. The final result is thereby formed without a full table lookup of each element of the final result." The patent application was filed on Oct. 12, 2007 (11/871,668). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7962718.PN.&OS=PN/7962718&RS=PN/7962718 Written by Ankresh Ranjan; edited by Jaya Anand. *** Delavaldene, Puterbaugh Assigned Patent ALEXANDRIA, Va., June 15 -- Jean Pierre Delavaldene, Dallas, and Kevin Puterbaugh, Ducanville, Texas, have been assigned a patent (D639,536) developed by Jean Pierre Delavaldene, and Kevin Puterbaugh, for an ornamental design for a soccer ball sandal. The abstract of the patent published by the U.S. Patent and Trademark Office states: "The ornamental design for soccer ball sandal, as shown and described." The patent application was filed on Feb. 11, 2011 (D/385,338). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D639,536.PN.&OS=PN/D639,536&RS=PN/D639,536 Written by Anjali Jha; edited by Jaya Anand. *** Verizon Business Global Assigned Patent ALEXANDRIA, Va., June 15 -- Verizon Business Global, Basking Ridge, N.J., has been assigned a patent (7,962,960) developed by Robert T. Fudge, Quinlan, Texas, for "systems and methods for performing risk analysis." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for analyzing a network element may include assigning values to each of a plurality of vulnerabilities. The method may also include identifying a vulnerability associated with the network element and generating a risk indicator for the network element based on the assigned value associated with the identified vulnerability." The patent application was filed on Oct. 19, 2005 (11/252,830). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,62,960.PN.&OS=PN/79,62,960&RS=PN/79,62,960 Written by Anjali Jha; edited by Jaya Anand. *** International Business Machines Assigned Patent for Method and Apparatus for Detecting Port Scans with Fake Source Address ALEXANDRIA, Va., June 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,962,957) developed by five co-inventors for a "method and apparatus for detecting port scans with fake source address." The co-inventors are Susann Marie Keohane, Austin, Texas, Gerald Francis McBrearty, Austin, Texas, Shawn Patrick Mullen, Buda, Texas, Jessica Carol Murillo, Round Rock, Texas, and Johnny Meng-Han Shieh, Austin, Texas. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A computer implemented method, apparatus, and computer program product for port scan protection. A reply data packet having a modified transmission control protocol header is generated to form a modified reply data packet, in response to detecting a port scan. The modified reply data packet will elicit a response from a recipient of the modified data packet. The reply data packet is sent to a first Internet protocol address associated with the port scan. A second Internet protocol address is identified from a header of the response to the modified reply data packet. The second Internet protocol address is an actual Internet protocol address of a source of the port scan. All network traffic from the second Internet protocol address may be blocked to prevent an attack on any open ports from the source of the port scan." The patent application was filed on April 23, 2007 (11/738,547). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,62,957.PN.&OS=PN/79,62,957&RS=PN/79,62,957 Written by Anjali Jha; edited by Jaya Anand. *** International Business Machines Assigned Patent ALEXANDRIA, Va., June 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,962,962) developed by 18 co-inventors for "using an object model to improve handling of personally identifiable information." The co-inventors are Steven B. Adler, Port Washington, N.Y., Endre Felix Bangerter, Ligerz, Switzerland, Kathryn Ann Bohrer, Austin, Texas, Nigel Howard Julian Brown, Richmond Hill, Canada, Jan Camenisch, Ruschlikon, Switzerland, Arthur M. Gilbert, Bethel, Conn., Dogan Kesdogan, White Plains, N.Y., Matthew P. Leonard, Upper Saddle River, N.J., Xuan Liu, Yorktown Heights, N.Y., Michael Robert McCullough, Washington, Adam Charles Nelson, Chicago, Charles Campbell Palmer, Goldens Bridge, N.Y., Calvin Stacy Powers, Chapel Hill, N.C., Michael Schnyder, Bern, Switzerland, Edith Schonberg, New York City, N.Y., Matthias Schunter, Oldenburg, Germany, Elsie Van Herreweghen, Adiswil, Switzerland, and Michael Waidner, Appitacsh, Switzerland. The abstract of the patent published by the U.S. Patent and Trademark Office states: "In a computer, a first set of object classes are provided representing active entities in an information-handling process and a second set of object classes are provided representing data and rules in the information-handling process. At least one object class has rules associated with data. The above-mentioned objects are used in constructing a model of an information-handling process, and to provide an output that identifies at least one way in which the information-handling process could be improved. One aspect is a method for handling personally identifiable information. Another aspect is a system for executing the method of the present invention. A third aspect is as a set of instructions on a computer-usable medium, or resident in a computer system, for executing the method of the present invention." The patent application was filed on June 19, 2001 (09/884,311). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,62,962.PN.&OS=PN/79,62,962&RS=PN/79,62,962 Written by Anjali Jha; edited by Jaya Anand. *** International Business Machines Assigned Patent for Protecting Users from Malicious Pop-up Advertisements ALEXANDRIA, Va., June 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,962,955) developed by four co-inventors for a "protecting users from malicious pop-up advertisements." The co-inventors are Gregory J. Boss, American Fork, Utah, Gang Chen, Oceanside, N.Y., Rick A. Hamilton II, Charlottesville, Va., and John S. Langford, Austin, Texas. The abstract of the patent published by the U.S. Patent and Trademark Office states: "The present invention is a solution for detecting a spoofed command button in a pop-up window. The solution tracks the creation process of a pop-up window, detects the presence of command buttons in the pop-up window, verifies the value labeled on each command button in the pop-up window and determines a follow-up action generated from selecting a command button on the pop-up window." The patent application was filed on Aug. 15, 2006 (11/464,581). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,62,955.PN.&OS=PN/79,62,955&RS=PN/79,62,955 Written by Anjali Jha; edited by Jaya Anand. *** Nokia Assigned Patent ALEXANDRIA, Va., June 15 -- Nokia, Finland, has been assigned a patent (7,962,953) developed by Umesh Chandra, Allen, Texas, David Leon, Irving, Texas, and Sanjeev Verma, San Diego, for a "DRM protected content sharing." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method for transmitting protected real-time content from one user to another is described. In a first aspect, a user sends a Rights Object to another user. In a second aspect, a user sends a Rights Object to another user via an intermediate server for a multiparty communication. In this second aspect, the users may be able to switch between designated Rights Objects as needed." The patent application was filed on Dec. 28, 2006 (11/617,306). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=79,62,953.PN.&OS=PN/79,62,953&RS=PN/79,62,953 Written by Anjali Jha; edited by Jaya Anand. *** Texas Instruments Assigned Patent for I/O Switches and Serializer for Each Parallel Scan Register ALEXANDRIA, Va., June 15 -- Texas Instruments, Dallas, has been assigned a patent (7,962,816) developed by Lee D. Whetsel, Parker, Texas, for "I/O switches and serializer for each parallel scan register." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An emulator for emulating operations of data processing circuitry normally connected to and cooperable with a peripheral circuit includes serial scanning circuitry connectable to the peripheral circuit. The serial scanning circuitry provides to and receives from the peripheral circuit signals which would normally be provided and received by the data processing circuitry. The serial scanning circuitry is connectable to an emulation controller for transferring serial data between the emulation controller and the emulator. The serial scanning circuitry includes a first state machine having plural states controlling the transfer of serial data. The emulator further includes control circuitry connected to the serial scanning circuitry and connectable to the emulation controller. The control circuitry, when connected to the emulation controller, effects the providing and receiving of signals and the transferring of serial data between the emulation controller and the emulator continuously without interruption while the first state machine remains in one state." The patent application was filed on July 13, 2010 (12/835,358). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7,962,816.PN.&OS=PN/7,962,816&RS=PN/7,962,816 Written by Shabnam Sheikh; edited by Jaya Anand. *** Texas Instruments Assigned Patent for IEEE 1149.1 and P1500 Test Interfaces Combined Circuits and Processes ALEXANDRIA, Va., June 15 -- Texas Instruments, Dallas, has been assigned a patent (7,962,817) developed by Lee D. Whetsel, Parker, Texas, for "IEEE 1149.1 and P1500 test interfaces combined circuits and processes." The abstract of the patent published by the U.S. Patent and Trademark Office states: "In a first embodiment a TAP of IEEE standard 1149.1 is allowed to commandeer control from a WSP of IEEE standard P1500 such that the P1500 architecture, normally controlled by the WSP, is rendered controllable by the TAP. In a second embodiment (1) the TAP and WSP based architectures are merged together such that the sharing of the previously described architectural elements are possible, and (2) the TAP and WSP test interfaces are merged into a single optimized test interface that is operable to perform all operations of each separate test interface. One approach provides for the TAP to maintain access and control of the TAP instruction register, but provides for a selected data register to be accessed and controlled by either the TAP+ATC or by the discrete CaptureDR, UpdateDR, TransferDR, ShiftDR, and ClockDR WSP data register control signals." The patent application was filed on Dec. 16, 2010 (12/970,112). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7,962,817.PN.&OS=PN/7,962,817&RS=PN/7,962,817 Written by Shabnam Sheikh; edited by Jaya Anand. *** Texas Instruments Assigned Patent for Mode Selection Based on Special Sequence of State Machine States ALEXANDRIA, Va., June 15 -- Texas Instruments, Dallas, has been assigned a patent (7,962,814) developed by Gary L. Swoboda, Parker, Texas, for a "mode selection based on special sequence of state machine states." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method of causing an interface to implement a mode from a plurality of selectable modes in which the interface operates according to a plurality of states defined by a state machine comprises sequencing through a sequence of the states, and detecting a predetermined sequence of the states. The predetermined sequence of the states represents a no-operation for at least one of the modes and also represents a mode change command." The patent application was filed on July 1, 2009 (12/496,267). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7,962,814.PN.&OS=PN/7,962,814&RS=PN/7,962,814 Written by Shabnam Sheikh; edited by Jaya Anand. *** Texas Instruments Assigned Patent for Scan Controller Control Input to Sequential Core without Scan Path ALEXANDRIA, Va., June 15 -- Texas Instruments, Dallas, has been assigned a patent (7,962,812) developed by Lee D. Whetsel, Parker, Texas, for a "scan controller control input to sequential core without scan path." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Scan distributor, collector, and controller circuitry connect to the functional inputs and outputs of core circuitry on integrated circuits to provide testing through those functional inputs and outputs. Multiplexer and demultiplexer circuits select between the scan circuitry and the functional inputs and outputs. The core circuitry can also be provided with built-in scan distributor, collector, and controller circuitry to avoid having to add it external of the core circuitry. With appropriately placed built-in scan distributor and collector circuits, connecting together the functional inputs and outputs of the core circuitry also connects together the scan distributor and collector circuitry in each core. This can provide a hierarchy of scan circuitry and reduce the need for separate test interconnects and multiplexers." The patent application was filed on Dec. 15, 2009 (12/638,539). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7,962,812.PN.&OS=PN/7,962,812&RS=PN/7,962,812 Written by Shabnam Sheikh; edited by Jaya Anand. *** Verizon Patent and Licensing Assigned Patent ALEXANDRIA, Va., June 15 -- Verizon Patent and Licensing, Basking Ridge, N.J., has been assigned a patent (7,962,806) developed by five co-inventors for a "method and system for providing bit error rate characterization." The co-inventors are Scott R. Kotrla, Wylie, Texas, Christopher N. DelRegno, Rowlett, Texas, Michael U. Bencheck, Richardson, Texas, Matthew W. Turlington, Richdardson, Texas, and Glenn A. Wellbrock, Wylie, Texas. The abstract of the patent published by the U.S. Patent and Trademark Office states: "An approach is provided for bit error rate characterization. A test signal representing one or more Ethernet frames exhibiting a particular bit error rate is generated. The test signal is output to a device under test. Traffic is received from the device under test. A determination is made as to whether a link failure condition exists at a port on an Ethernet switch." The patent application was filed on Oct. 14, 2008 (12/250,587). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7,962,806.PN.&OS=PN/7,962,806&RS=PN/7,962,806 Written by Shabnam Sheikh; edited by Jaya Anand. *** Texas Instruments Assigned Patent for 1149.1 Tap Linking Modules ALEXANDRIA, Va., June 15 -- Texas Instruments, Dallas, has been assigned a patent (7,962,813) developed by four co-inventors for 1149.1 tap linking modules. The co-inventors are Lee D. Whetsel, Parker, Texas, Baher S. Haroun, Allen, Texas, Brian J. Lasher, Bellaire, Texas, and Anjali Kinra, Baton Rouge, La. The abstract of the patent published by the U.S. Patent and Trademark Office states: "IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations." The patent application was filed on May 4, 2009 (12/434,929). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7,962,813.PN.&OS=PN/7,962,813&RS=PN/7,962,813 Written by Shabnam Sheikh; edited by Jaya Anand. *** International Business Machines Assigned Patent for System and Method for Call Stack Sampling Combined with Node and Instruction Tracing ALEXANDRIA, Va., June 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,962,924) developed by Kean G. Kuiper, Round Rock, Texas, Frank Eliot Levine, Austin, Texas, and Enio Manuel Pineda, Austin, Texas, for a "system and method for call stack sampling combined with node and instruction tracing." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method for Java.TM. call stack sampling combined with native sampling is presented. A kernel-mode device driver records and stores sampled context information that includes a program counter, a thread identifier, and a process identifier. The sampling thread receives a notification from the kernel-mode device driver, and proceeds to collect call stack information from a Java.TM. Virtual Machine. In turn, the sampling thread retrieves the sampled context information and harvests symbols corresponding to a loaded module. Once symbols are harvested, the sampling thread combines returned call stack nodes with native function leaf nodes into a unified output tree that provides the relationship between the two different node types. In one embodiment, the sampling thread may generate native function leaf nodes and the unified output tree in a post-processing manner." The patent application was filed on June 7, 2007 (11/759,588). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,962,924.PN.&OS=PN/7,962,924&RS=PN/7,962,924 Written by Anjali Jha; edited by Jaya Anand. *** Texas Instruments Assigned Patent ALEXANDRIA, Va., June 15 -- Texas Instruments, Dallas, has been assigned a patent (7,962,818) developed by Lee D. Whetsel, Parker, Texas, for a "reduced signaling interface method and apparatus." The abstract of the patent published by the U.S. Patent and Trademark Office states: "This disclosure describes a reduced pin bus that can be used on integrated circuits or embedded cores within integrated circuits. The bus may be used for serial access to circuits where the availability of pins on ICs or terminals on cores is limited. The bus may be used for a variety of serial communication operations such as, but not limited to, serial communication related test, emulation, debug, and/or trace operations of an IC or core design. Other aspects of the disclosure include the use of reduced pin buses for emulation, debug, and trace operations and for functional operations. In a fifth aspect of the present disclosure, an interface select circuit, FIGS. 41-49, provides for selectively using either the 5 signal interface of FIG. 41 or the 3 signal interface of FIG. 8." The patent application was filed on Jan. 6, 2011 (12/985,876). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7,962,818.PN.&OS=PN/7,962,818&RS=PN/7,962,818 Written by Shabnam Sheikh; edited by Jaya Anand. *** Texas Instruments Assigned Patent for Tap Demultiplexer with Select and Select One Outputs for HTML ALEXANDRIA, Va., June 15 -- Texas Instruments, Dallas, has been assigned a patent (7,962,815) developed by Lee D. Whetsel, Parker, Texas, for a "tap demultiplexer with select and select one outputs for HTML." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An integrated circuit can have plural core circuits, each having a test access port that is defined in IEEE standard 1149.1. Access to and control of these ports is though a test linking module. The test access ports on an integrated circuit can be arranged in a hierarchy with one test linking module controlling access to plural secondary test linking modules and test access ports. Each secondary test linking module in turn can also control access to tertiary test linking modules and test access ports. The test linking modules can also be used for emulation." The patent application was filed on July 6, 2010 (12/830,933). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7,962,815.PN.&OS=PN/7,962,815&RS=PN/7,962,815 Written by Shabnam Sheikh; edited by Jaya Anand. *** International Business Machines Assigned Patent for Scan Chain Disable Function for Power Saving ALEXANDRIA, Va., June 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,962,811) developed by five co-inventors for a "scan chain disable function for power saving." The co-inventors are Sang Hoo Dhong, Austin, Texas, Joel Abraham Silberman, Somers, N.Y., Osamu Takahashi, Round Rock, Texas, James Douglas Warnock, Somers, N.Y., and Dieter Wendel, Schoenaich, Germany. The abstract of the patent published by the U.S. Patent and Trademark Office states: "An apparatus, a method and a computer program product are provided for conserving energy during functional mode of a processor by disabling the scan chain. By inserting logic gating into the scan chain it is possible to disable the scan chain during the processor's functional mode. During functional mode the scan out port of the latch bit in a scan chain toggles, which leads to unnecessary energy consumption. By gating scan control signals and the scan out port of a latch bit, the scan chain segment between latch bits can be disconnected. Therefore, the scan control signals can disable the scan chain during functional mode." The patent application was filed on Oct. 25, 2006 (11/552,807). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7,962,811.PN.&OS=PN/7,962,811&RS=PN/7,962,811 Written by Shabnam Sheikh; edited by Jaya Anand. *** International Business Machines Assigned Patent for Method and Apparatus for Preventing Undesired Termination of a Process in an Information Handling System ALEXANDRIA, Va., June 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,962,911) developed by Yinhe Cheng, Austin, Texas, and Hsian-Fen Tsao, Austin, Texas, for a "method and apparatus for preventing undesired termination of a process in an information handling system." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An information handling system (IHS) employs operating system software to manage IHS resources. The operating system software manages software application programs as processes executing within the IHS. The processes run in foreground and background mode within the IHS. Processes running in foreground mode are subject to hang-up events with negative process output results, such as output data loss. In one embodiment, the operating system software supports a "no hang-up now" command for use with processes running in foreground mode. The "no hang-up now" command provides system users the ability to hang-up or log-out of an IHS terminal without negative effects on the current foreground process. A user may invoke the "no hang-up now" command after execution of the foreground process is already underway. The no hang-up command moves the foreground application to the background for continued execution. A signal handler program prevents termination of the background process until the process completes." The patent application was filed on Feb. 2, 2007 (11/670,572). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,962,911.PN.&OS=PN/7,962,911&RS=PN/7,962,911 Written by Anjali Jha; edited by Jaya Anand. *** International Business Machines Assigned Patent for Scheduling Threads in a Multiprocessor Computer ALEXANDRIA, Va., June 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,962,913) developed by six co-inventors for a "scheduling threads in a multiprocessor computer." The co-inventors are Jos Manuel Accapadi, Austin, Texas, Mathew Accapadi, Austin, Texas, Andrew Dunshea, Austin, Texas, Mark Elliott Hack, Cedar Park, Texas, Agustin Mena III, Austin, Texas, and Mysore Sathyanarayana Srinivas, Austin, Texas. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods, systems, and computer program products are provided for scheduling threads in a multiprocessor computer. Embodiments include selecting a thread in a ready queue to be dispatched to a processor and determining whether an interrupt mask flag is set in a thread control block associated with the thread. If the interrupt mask flag is set in the thread control block associated with the thread, embodiments typically include selecting a processor, setting a current processor priority register of the selected processor to least favored, and dispatching the thread from the ready queue to the selected processor. In some embodiments, setting the current processor priority register of the selected processor to least favored is carried out by storing a value associated with the highest interrupt priority in the current processor priority register." The patent application was filed on Dec. 23, 2008 (12/342,352). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,962,913.PN.&OS=PN/7,962,913&RS=PN/7,962,913 Written by Anjali Jha; edited by Jaya Anand. *** International Business Machines Assigned Patent for Self-learning of the Optimal Power or Performance Operating Point of a Computer Chip ALEXANDRIA, Va., June 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (7,962,887) developed by four co-inventors for a "self-learning of the optimal power or performance operating point of a computer chip based on instantaneous feedback of present operating environment." The co-inventors are Carl John Anderson, Austin, Texas, Michael Stephen Floyd, Cedar Park, Texas, Norman Karl James, Liberty Hill, Texas, and Phillip John Restle, Katonah, N.Y. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Sensors on the integrated circuit are used to detect the current operating state of the chip, such as frequency, voltage, temperature characteristics, or variation in the integrated circuit manufacturing process. In response, the integrated circuit may choose to modify operational parameters (such as frequency, voltage, or power-down states) in order to dynamically and autonomously maintain an optimal performance and/or power-efficiency operational point." The patent application was filed on June 16, 2008 (12/139,928). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7,962,887.PN.&OS=PN/7,962,887&RS=PN/7,962,887 Written by Ankita Das; edited by Jaya Anand. *** Baker Hughes Assigned Patent for Cutting Structure for Earth-boring Bit to Reduce Tracking ALEXANDRIA, Va., June 15 -- Baker Hughes, Houston, has been assigned a patent (RE42,445) developed by Floyd Felderhoff, Montgomery, Texas, Matthew R. Isbell, Norman, Okla., and Rudolf C. Pessie, The Woodlands, Texas, for a "cutting structure for earth-boring bit to reduce tracking." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An earth boring bit has cutting elements arranged to avoid tracking. The bit has a bit body having a bit axis of rotation. First, second and third cones are rotatably mounted to the bit body, each of the cones having a plurality of rows of cutting elements including a heel row and an adjacent row. The heel row of the first cone has at least equal the number of cutting elements as the heel rows of the other cones. The adjacent row of the second cone has at least 90 percent as many cutting elements as the heel row of the first cone. The heel row of the third cone has a pitch that is in the range from 20-50% greater than the heel rows of the first cone." The patent application was filed on June 4, 2010 (12/794,510). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=RE42,445&OS=RE42,445&RS=RE42,445 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Cellfor Assigned Patent ALEXANDRIA, Va., June 15 -- Cellfor, Saanichton, British Columbia, Canada, has been assigned a patent (PP21,973) developed by six co-inventors for a "loblolly pine tree named 'CF LP1-7696'." The co-inventors are John Pait, Atlanta, Nicholas Muir, Lufkin, Texas, Stephen Attree, Victoria, Canada, Plamen Denchev, Victoria, Canada, Robert Weir, Cary, N.C., and Andy Benowicz, Victoria, Canada. The abstract of the patent published by the U.S. Patent and Trademark Office states: "A new and distinctive variety of a loblolly pine tree which has been denominated varietally as 'CF LP1-7696' which is distinguished by high growth rate, good resistance to fusiform rust, excellent stem straightness, medium crown width, medium number of whorls, medium branch angle and medium branch diameter." The patent application was filed on June 23, 2009 (12/456,839). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=PP21,973&OS=PP21,973&RS=PP21,973 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Danco Assigned Patent for Center Pullout Spray Head ALEXANDRIA, Va., June 15 -- Danco, Irving, Texas, has been assigned a patent (No. D639,909) developed by Justin D. Pendleton, The Colony, Texas, for an ornamental design for a "center pullout spray head." The abstract of the patent published by the U.S. Patent and Trademark Office states: "The ornamental design for a center pullout spray head, as shown and described." The patent application was filed on Jan. 5, 2011 (D/382,605). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D639,909&OS=D639,909&RS=D639,909 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Danco Assigned Patent ALEXANDRIA, Va., June 15 -- Danco, Irving, Texas, has been assigned a patent (No. D639,914) developed by Chad H. Jones, Frisco, Texas, and Justin D. Pendleton, The Colony, Texas, for an ornamental design for a decorative tub spout. The abstract of the patent published by the U.S. Patent and Trademark Office states: "The ornamental design for a decorative tub spout, as shown and described." The patent application was filed on Jan. 5, 2011 (D/382,590). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D639,914&OS=D639,914&RS=D639,914 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Texas Inventor Develops Patent for Leash ALEXANDRIA, Va., June 15 -- Bonnie J. Mendelson, Frisco, Texas, has been issued a patent (D640,017) for an ornamental design for a leash. The patent application was filed on June 3, 2009 (D/338,001). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D640,017&OS=D640,017&RS=D640,017 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Peerless Assigned Patent ALEXANDRIA, Va., June 15 -- Peerless, Dallas, has been assigned a patent (No. D639,901) developed by Mark A. Buzanowski, Carrollton, Texas, for an ornamental design for a filter cartridge. The abstract of the patent published by the U.S. Patent and Trademark Office states: "The ornamental design for a filter cartridge, as shown and described." The patent application was filed on May 14, 2010 (D/361,826). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D639,901&OS=D639,901&RS=D639,901 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Peerless Assigned Patent for Filter Cartridge ALEXANDRIA, Va., June 15 -- Peerless, Dallas, has been assigned a patent (No. D639,900) developed by Mark A. Buzanowski, Carrollton, Texas, for an ornamental design for a filter cartridge. The abstract of the patent published by the U.S. Patent and Trademark Office states: "The ornamental design for a filter cartridge, as shown and described." The patent application was filed on May 14, 2010 (D/361,825). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D639,900&OS=D639,900&RS=D639,900 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Danco Assigned Patent for Decorative Tub Spout ALEXANDRIA, Va., June 15 -- Danco, Irving, Texas, has been assigned a patent (No. D639,913) developed by Chad H. Jones, Frisco, Texas, and Justin D. Pendleton, The Colony, Texas, for an ornamental design for a decorative tub spout. The abstract of the patent published by the U.S. Patent and Trademark Office states: "The ornamental design for a decorative tub spout, as shown and describe." The patent application was filed on Jan. 6, 2011 (D/382,672). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D639,913&OS=D639,913&RS=D639,913 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Applied Materials Assigned Patent ALEXANDRIA, Va., June 15 -- Applied Materials, Santa Clara, Calif., has been assigned a patent (7,962,864) developed by five co-inventors for a stage yield prediction. The co-inventors are Youval Nehmadi, Modiin, Israel, Rinat Shimshi, San Jose, Calif., Vicky Svidenko, San Jose, Calif., Alexander T.Schwarm, Austin, Texas, and Sundar Jawaharlal, Glen Allen, Va. The abstract of the patent published by the U.S. Patent and Trademark Office states: "In one embodiment, a method for predicting yield during the design stage includes receiving defectivity data identifying defects associated with previous wafer designs, and dividing the defects into systematic defects and random defects. For each design layout of a new wafer design, yield is predicted separately for the systematic defects and the random defects. A combined yield is then calculated based on the yield predicted for the systematic defects and the yield predicted for the random defects." The patent application was filed on May 22, 2008 (12/154,458). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7,962,864.PN.&OS=PN/7,962,864&RS=PN/7,962,864 Written by Ankita Das; edited by Jaya Anand. *** Texas Inventors Develop Patent for Traction Device ALEXANDRIA, Va., June 15 -- Jose Gomez Jr., Humble, Texas, and Victor B. Ramos, Houston, have been issued a patent (D639,961) for an ornamental design for a traction device. The patent application was filed on Nov. 16, 2009 (D/350,382). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D639,961&OS=D639,961&RS=D639,961 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Texas Inventors Develops Patent for Weighted Exercise Pants ALEXANDRIA, Va., June 15 -- George Pou, Houston, and Julie Pou, Houston, have been issued a patent (D639,875) for an ornamental design for weighted exercise pants. The patent application was filed on Dec. 11, 2010 (D/380,849). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=D639,875&OS=D639,875&RS=D639,875 Written by Satyaban Rath; edited by Hemanta Panigrahi. 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