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U.S. Patents Awarded to Inventors in Oregon (June 10)(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., June 10 -- The following federal patents were awarded to inventors in Oregon. *** Intel Assigned Patent ALEXANDRIA, Va., June 9 -- Intel, Santa Clara, Calif., has been assigned a patent (7,956,860) developed by Adam T. Lake, Portland, Ore., and Carl S. Marshall, Portland, Ore., for "subdividing geometry images in graphics hardware." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system may include a graphics memory, a data bus, a processor, and a vertex shader. The data bus may be operatively connected to the graphics memory. The processor may send vertex data to the graphics memory via the data bus. The vertex shader may read the vertex data from the graphics memory and may subdivide the vertex data into subdivided vertex data. The vertex shader may also write the subdivided vertex data to the graphics memory." The patent application was filed on May 26, 2010 (12/787,520). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7,956,860.PN.&OS=PN/7,956,860&RS=PN/7,956,860 Written by Shabnam Sheikh; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., June 10 -- Intel, Santa Clara, Calif., has been assigned a patent (7,957,216) developed by Kuljit S. Bains, Olympia, Wash., and John Halbert, Beaverton, Ore., for a "common memory device for variable device width and scalable pre-fetch and page size." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Embodiments of the invention are generally directed to systems, methods, and apparatuses for a common memory device for variable device width and scalable pre-fetch and page size. In some embodiments, a common memory device (such as a DRAM) can operate in any of a number of modes including, for example, a x4 mode, a x8 mode, and a x16 mode. The page size provided by the DRAM may vary depending on the mode of the DRAM. In some embodiments, the amount of data pre-fetched by the DRAM also varies depending on the mode of the DRAM." The patent application was filed on Sept. 30, 2008 (12/241,192). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,957,216.PN.&OS=PN/7,957,216&RS=PN/7,957,216 Written by Arpi Sharma; edited by Jaya Anand. *** Lattice Semiconductor Assigned Patent ALEXANDRIA, Va., June 10 -- Lattice Semiconductor, Hillsboro, Ore., has been assigned a patent (7,957,208) developed by five co-inventors for a "flexible memory architectures for programmable logic devices." The co-inventors are Howard Tang, San Jose, Calif., Fabiano Fontana, San Jose, Calif., David L. Rutledge, Hillsboro, Ore., Om P. Agrawal, Los Altos, Calif., and Henry Law, Los Altos, Calif. The abstract of the patent published by the U.S. Patent and Trademark Office states: "In one embodiment, a programmable logic device includes a plurality of logic blocks; a plurality of input/output blocks; volatile configuration memory adapted to store configuration data for configuration of the logic blocks and input/output blocks; embedded block RAM adapted to store user data; flash memory having at least a first partition and a second partition; and a data port adapted to provide external device access to the first partition of the non-volatile memory. The flash memory is adapted to store within the first partition user data from the data port and is further adapted to store within the second partition user data from the embedded block RAM." The patent application was filed on Feb. 19, 2009 (12/389,149). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,957,208.PN.&OS=PN/7,957,208&RS=PN/7,957,208 Written by Arpi Sharma; edited by Jaya Anand. *** Intel Assigned Patent for Electronic Device Thermal Management ALEXANDRIA, Va., June 10 -- Intel, Santa Clara, Calif., has been assigned a patent (7,957,131) developed by four co-inventors for an "electronic device thermal management." The co-inventors are Rajiv K. Mongia, Fremont, Calif., Mark MacDonald, Beaverton, Ore., Eduardo Hernandez-Pacheco, Beaverton, Ore., and Jered H. Wikander, Portland, Ore. The abstract of the patent published by the U.S. Patent and Trademark Office states: "An electronic device comprises a housing, at least one heat generating component in the housing, and at least one thermal management device in thermal communication with the at least one heat generating component, wherein the at least one thermal management device selectively allocates heat flow to one or more portions of the housing. Other embodiments may be described." The patent application was filed on Dec. 23, 2009 (12/655,147). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,957,131.PN.&OS=PN/7,957,131&RS=PN/7,957,131 Written by Arpi Sharma; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., June 10 -- Intel, Santa Clara, Calif., has been assigned a patent (7,957,531) developed by Gary L. Graunke, Hillsboro, Ore., for a "method and apparatus for detection of loss of cipher synchronization." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Detecting loss of stream cipher synchronization between a transmitter and a receiver in a video processing system may be achieved by receiving, by the receiver, an encrypted video frame from the transmitter, obtaining an encrypted value for a selected pixel in the encrypted video frame, decrypting the encrypted pixel value using a first portion of the receiver's current key stream, re-encrypting the pixel value using a second portion of the receiver's current key stream, sending the re-encrypted pixel value from the receiver to the transmitter, obtaining, by the transmitter, a plaintext value for the selected pixel from a corresponding original video frame and encrypting the plaintext pixel value using a second portion of the transmitter's current key stream, and comparing the re-encrypted pixel value received from the receiver with the encrypted pixel value generated by the transmitter and detecting a loss of cipher synchronization when the values do not match." The patent application was filed on March 26, 2009 (12/383,652). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,957,531&OS=7,957,531&RS=7,957,531 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Intel Assigned Patent for Methods and Apparatuses to Effect a Variable-width Link ALEXANDRIA, Va., June 10 -- Intel, Santa Clara, Calif., has been assigned a patent (7,957,428) developed by nine co-inventors for "methods and apparatuses to effect a variable-width link." The co-inventors are Maurice B. Steinman, Marlborough, Mass., Rahul R. Shah, Marlborough, Mass., Naveen Cherukuri, San Jose, Calif., Aaron T. Spink, San Francisco, Allen J. Baum, Palo Alto, Calif., Sanjay Dabral, Palo Alto, Calif., Tim Frodsham, Portland, Ore., David S. Dunning, Portland, Ore., and Theodore Z. Schoenborn, Portland, Ore. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Embodiments of the invention provide an algorithm for dividing a link into one or more reduced-width links. For one embodiment of the invention, a multiplexing scheme is employed to effect a bit transmission order required by a particular cyclic redundancy check. The multiplexed output bits are then swizzled on-chip to reduce on-board routing congestion." The patent application was filed on May 21, 2004 (10/850,809). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,957,428&OS=7,957,428&RS=7,957,428 Written by Satyaban Rath; edited by Hemanta Panigrahi. *** Hewlett-Packard Development Assigned Patent ALEXANDRIA, Va., June 10 -- Hewlett-Packard Development, Houston, has been assigned a patent (7,957,054) developed by four co-inventors for electro-optical display systems. The co-inventors are Jong-Souk Yeo, Corvallis, Ore., Stephen Kitson, Bristol, United Kingdom, Michael G. Groh, Albany, Ore., and Bret Mchuron-Guss, Blodgett, Ore. The abstract of the patent published by the U.S. Patent and Trademark Office states: "Electro-optical display systems are disclosed. An electro-optical display system may include a plurality of electrodes; a display volume containing a fluid having a plurality of colorant particles; a layer adjacent to or part of at least one electrode of the plurality of electrodes and configured to at least one of (i) reflect at least one wavelength of light and (ii) absorb at least one wavelength of light; and recessed regions configured to contain the plurality of colorant particles, wherein the plurality of electrodes are configured to selectively move the plurality of colorant particles between a compacted position in which all or nearly all of the plurality of colorant particles are in the recessed regions, and a spread position in which the plurality of colorant particles are spread across the display volume." The patent application was filed on Dec. 21, 2009(12/643,756). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7,957,054.PN.&OS=PN/7,957,054&RS=PN/7,957,054 Written by Rajat Puri; edited by Jaya Anand. *** Pennsylvania Inventor Develops Patent for System for Metering Vehicular Traffic at Toll Plaza ALEXANDRIA, Va., June 10 -- Howard H. Roberts, Newtown, Pa., has developed a patent (7,956,768) for a "system for metering vehicular traffic at a toll plaza." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method is provided for metering vehicular traffic. Specifically, the system uses a computer to prevent delays as vehicles transition from a greater number of toll lanes to a lesser number of travel lanes. Toll collection devices are used to send a ready signal to a computer to indicate a vehicle is ready to leave a start point. The computer receives ready signals from the toll collection devices and uses a pre-programmed departure schedule to queue the vehicles. After the vehicles are queued, the computer uses time delay variables to ensure efficient traffic flow between the toll lanes of the plaza and the travel lanes of the bridge or tunnel. An indicator signal responsive to a departure signal sent by the computer is employed to direct vehicles from a start point towards a travel lane." The patent application was filed on March 11, 2009 (12/402,326). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7956768.PN.&OS=PN/7956768&RS=PN/7956768 Written by Ankresh Ranjan; edited by Jaya Anand. *** Sharp Laboratories of America Assigned Patent for Detection of Signaling Flows ALEXANDRIA, Va., June 10 -- Sharp Laboratories of America, Camas, Wash., has been assigned a patent (7,957,278) developed by Daniel J. Park, Beaverton, Ore., for a "detection of signaling flows." The abstract of the patent published by the U.S. Patent and Trademark Office states: "The embodiments of the present invention provide for methods, devices, and systems for providing quality of service (QoS) to network data that is received by an intermediate node in a local area network. In general, the embodiments of the present invention generally evaluate network traffic. Certain streams or flows are copied in appropriate buffer areas and accordingly evaluated by their traffic flow characteristics and further evaluated to determine if such streams/flows contain signaling or control information, which may be based on characteristic key words and/or structures. Based on the signaling or control information extracted, the appropriate stream is accordingly assigned or configured for quality of service (QoS) handling." The patent application was filed on May 21, 2007 (11/751,345). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7957278.PN.&OS=PN/7957278&RS=PN/7957278 Written by Kusum Sangma; edited by Anand Kumar. *** Intel Assigned Patent for Broadband Wireless Access Network and Method for Internet Protocol (IP) Multicasting ALEXANDRIA, Va., June 10 -- Intel, Santa Clara, Calif., has been assigned a patent (7,957,287) developed by Muthaiah Venkatachalam, Beaverton, Ore., for a "broadband wireless access network and method for internet protocol (IP) multicasting." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Embodiments of a wireless access network and method for IP multicasting are generally described herein. Other embodiments may be described and claimed. In some embodiments, a serving base station receives a dynamic service addition request from a mobile station on a primary management connection identifier (CID) to join an existing multicast session, and the serving base station responsively establishing a multicast CID for use on a link between the mobile station and the serving base station." The patent application was filed on Aug. 14, 2006 (11/464,449). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=7957287.PN.&OS=PN/7957287&RS=PN/7957287 Written by Kusum Sangma; edited by Anand Kumar. For more information about Targeted News Service products and services, please contact: Myron Struck, editor, Targeted News Service LLC, Springfield, Va., 703/304-1897; [email protected]; http://targetednews.com. -1050625 (c) 2011 Targeted News Service |