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Comparison of 3-bit per cell NAND Flash Memories(M2 PressWIRE Via Acquire Media NewsEdge) Dublin - Research and Markets (http://www.researchandmarkets.com/research/bfd047/comparison_of_3bi) has announced the addition of the "Comparison of 3-bit per cell NAND Flash Memories" report to their offering. This report compares the 3-bit per cell NAND flash memory architectures and key parameters of SanDisk/Toshiba, Hynix and Samsung and analyzes the advantages and disadvantages of each implementation. Key Topics Covered: Executive Summary - Introduction - Three-bit per cell NAND Flash Memories - SanDisk/Toshiba 56nm 16Gb 3-bit/cell NAND Flash Memory - Summary - Page Buffer - Page Organization - Cache algorithms - Source Line Bias Error Compensation - Power Routing Organization - Data Path - All Bitline vs. Interleaved Architecture - Program Speed - ABL - Considerations on Scalability - Hynix 48nm 32Gb 3-bit/cell NAND Flash Memory - Summary - Chip Architecture - Pass Bit Detector Circuits - Smart Blind Program Algorithm - Start Bias Controlled Program Algorithm - 32Gb 32nm 3-bit/cell SanDisk/Toshiba - Summary - Chip Architecture - Program Verify Read Before Programming - Compact Row Decoder - Extended Column Architecture - Samsung 51nm 16Gb 3-bit/cell NAND Flash Memory - Summary -- References -- About the Author -- About Forward Insights -- Services -- Contact -- Report Offerings List of Figures List of Tables For more information visit http://www.researchandmarkets.com/research/bfd047/comparison_of_3bi ((Comments on this story may be sent to [email protected])) (c) 2009 M2 COMMUNICATIONS [ Back To TMCnet.com's Homepage ] |