EDA start-up Pyxis unveils yield-driven IC router
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TMCNet:  EDA start-up Pyxis unveils yield-driven IC router

[November 27, 2007]

EDA start-up Pyxis unveils yield-driven IC router

(EDN Via Thomson Dialog NewsEdge) With Mentor Graphics (www.mentor.com
) acquisition this year of Sierra Design, IC-design groups have more choices than ever when it comes to shopping for IC place-and-route tools. Now, start-up Pyxis Technology has introduced its commercial place-and-route system, making the selection even larger and the choice more difficult. The NexusRoute hybrid grid- and shape-based router tightly couples to foundry data. The company also announced NexusYield design services to help its customers route blocks and chips.



In preparation for the 45-nm node, the big four EDA companiesCadence Design Systems (www.cadence.com

), Synopsys Inc (www.synopsys.com
), Mentor Graphics, and Magma Design Automation (www.magma-da.com
)have been diligently adding DFM (design-for-manufacturing) tools to their tool lineups and integrating DFM awareness into their place-and-route flows. Pyxis officials believe that its new offering will give users an edge over the competition because the company built the router from the ground up to incorporate manufacturing data into the routing process. We are trying to address yield and manufacturability issues, says Phil Bishop, Pyxis chief executive officer. There are three major components of yield:random defects affecting random yield; printability issues affecting systematic yield; and copper dishing, or CMP [chemical-mechanical polishing] affecting parametric yield. More and more, were seeing yield become design-dependent.



Most vendors endorse an iterative flow, in which users perform placement and routing, runtime analysis, and signal-integrity analysis. They then perform a postroute optimization; run DFM analysis, typically including yield, lithography, and CMP; and then run physical verification. This flow typically requires users to run multiple iterations among the various tools before they complete a design, which takes time and money. After they complete the chip design, they send it to the foundry, which may discover further problems that may require changes in the design step or even require new and expensive mask sets.

To address these problems, NexusRoute consolidates routing, timing analysis, signal-integrity analysis, postroute optimization, and DFM analysis into a single-pass flow. Pyxis claims that the tool provides a fourfold reduction in the design-and-manufacturing cycle. We have zeroed in on a new approach, tightly linking manufacturing with design, to achieve manufacturing closure, says Bishop. Within the database and the tool, we are looking at the routability, the throughput of the core-based routing, timing closure, and signal integrity. We are also looking at manufacturing effects, such as spreading wires, fattening wires, and protecting vias with secondary shapes or redundant vias. All of these approaches are attempts at removing yield detractors.

The tool allows users to instantly see what effects their designs will encounter in the random-, systematic-, and parametric-yield domains. The company integrated 34 DFM rules into the router to drive functions such as wire widening and spreading; jog elimination; 3-D-wire balancing; metal and via fill; lithography-pattern elimination, including necking and bridging; via minimization; and via protection through the use of double cuts and extra shapes. Pyxis DFM-analysis partner, PDF Solutions (www.pdf.com

), provided much of the data on random and systematic yield for the rules running on the Pyxis tool, and Brion-ASML (www.asml.com

) provided data on photolithography analysis. The company also worked closely with Ponte Solutions (www.ponte.com

) for analyzing random-yield effects. NexusRoute reads PDF Solutions yield-ramp-fail-rate-data PDFx models. Were not just improving yield; were measuring it and trying to give feedback on exactly what the router has done to incrementally improve the yield, says Bishop.

The PDFx data is especially effective in the router if the customer is targeting a foundry for which PDF Solutions has done characterization services. If customers are targeting a different foundry process, however, they can use generalized PDFx models of a process node. The tool also reads the standard physical-design formats, such as LEF (library-exchange format), DEF (design-exchange format), .lib/Liberty, and SPEF (standard parasitic-exchange format) to interface with other vendors flows. The company is also a member of OpenAccess (www.si2.org

) for interoperability with third-party vendors and has Silicon Canvas (www.sicanvas.com
), the provider of the Laker analog and full-custom-layout tool, as a partner.

Primarily a gridded router, the tool is shape-aware, which is important for routing at nodes smaller than 65 nm because designers must perform DRC (design-rules checking) while routing. The multithreaded tool also supports distributed processing to speed runtimes, which is especially useful during detailed routing, when the computationally intensive shape-based features are necessary. The company claims that, in benchmark tests, NexusRoute achieved a 5.1 to 11.1% better yield on 90-nm designs and 6.8 to 7.5% better yield on 65-nm designs than the major competitors in the IC-routing market. NexusRoute sells for $400,000 for a single-year subscription.

Pyxis Technology
, www.pyxistech.com
.

Copyright 2007 Reed Business Information. All Rights Reserved.

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