[June 04, 2007] Mindspeed(R) Introduces Dual-Core Packet Processors for Carrier-Class Customer Premise Applications Tweet NEWPORT BEACH, Calif. --(Business Wire)-- Mindspeed Technologies, Inc. (NASDAQ:MSPD), a leading supplier of semiconductor solutions for network infrastructure applications, today announced a new family of dual-core packet processors that will enable service providers to cost-effectively support sophisticated applications, high-performance packet processing and quality of service (QoS) for the triple-play broadband home and small and medium-sized enterprise (SME) markets. The Comcerto 100 Series of packet processors brings the field proven, carrier-class performance of Mindspeed's integrated system-on-chip (SoC) architecture to the customer premise gateway market. The new family of devices will enable service providers to deploy sophisticated, reliable services with the high-packet throughput required for delivering next-generation multimedia content to their subscribers. "Our new Comcerto 100 Series provides unprecedented price/performance in a range of pin-compatible devices that will allow customer premise equipment (CPE) manufacturers to design a family of advanced gateway solutions using the same software architecture to support broadband home routers, enterprise service routers, and high-end integrated access devices," said Preet Virk, vice president and business director of Mindspeed's CPE products. "With CPE equipment based on our Comcerto 100 Series packet processors, service providers will have the application and performance headroom they need to deploy new revenue-generating services to their broadband home and SME subscribers with capabilities such as sophisticated data routing with QoS, carrier-class voice-over-IP (VoIP), IPv6 support, virtual private networks with firewalls, 3DES & null SHA-1 support, packet filtering, as well as 802.11n Wi-Fi and WiMax data rates support for wireless home entertainment networks," Virk added. Mindspeed designed the Comcerto 100 Series to deliver carrier-class performance at competitive price points by integrating the industry-standard interfaces required for gigabit bandwidth with a secondary cache to optimize operating systems and applications performance, a security processor, dual ARM processors, sophisticated DMA engines, an internal bus architecture and on-chip memory to boost packet throughput. Its flexible, programmable architecture allows either or both ARM cores to be used for applications or packet processing, enabling equipment manufactures to offer multiple solutions tailored for specific deployments, and service providers to download software updates as new media content and features are introduced. Technical Details The Comcerto 100 Series device architecture includes a pair of high-performance ARM 11 processors, a security engine, a 64KB on chip memory, a 128KB L2 cache, plus a 64-bit wide, 165MHz multi-layer interconnect bus and built-in QoS and traffic management capabilities. The packet-processing ARM core runs standard ANSI C code to enable efficient programming and downloading of algorithms to manage evolving media content delivery requirements. For example, it has the flexibility and performance to run the evolving software for 802.11n routing, deep packet inspection for packet filtering and classification while simultaneously meeting the delay, jitter and latency requirements of real-time services. The application ARM processor runs all standard operating systems and off-the-shelf applications. All I/O functions are handled automatically via hardware assist with on-chip buffers to reduce bus contention. The use of DDR2 memory lowers total-system cost, and the ability to address 1GB of memory space gives service providers the flexibility and room to deploy the most sophisticated network infrastructure management applications and user services on the platform. The Comcerto 100 Series also features comprehensive high-performance interfaces for advanced networking and connectivity applications, including dual Gigabit Ethernet interfaces, PCI Bus, USB2.0 with PHY, TDM, and UTOPIA L2 interfaces. The new family runs OpenWrt Linux distribution and the same field-proven VoIP software suite developed for Mindspeed's Comcerto carrier VoIP processor family. To improve customers' time to market, a complete reference design, including hardware and software is available. Customers also have access to a large number of third-party software and hardware offerings through Mindspeed's OpenMind(TM) developer's program. The OpenMind program gives customers access to design expertise, proven operating system and software applications, and off-the-shelf and customized hardware, software and system solutions. Pricing and Availability The Comcerto 100 Series is sampling now in four configurations with an extensive set of feature options. Volume production is scheduled in the third calendar quarter of 2007. Prices range between $13 and $39 per unit in OEM quantities. About Mindspeed Technologies (R) Mindspeed Technologies, Inc. designs, develops and sells semiconductor networking solutions for communications applications in enterprise, access, metropolitan and wide area networks. The company's three key product families include high-performance analog transmission and switching solutions, multiservice access products designed to support voice and data services across wireline and wireless networks, and WAN communications solutions including T/E carrier physical-layer and link-layer devices as well as ATM/MPLS network processors. Mindspeed's products are used in a wide variety of network infrastructure equipment, including voice and media gateways, high-speed routers, switches, access multiplexers, cross-connect systems, add-drop multiplexers and digital loop carrier equipment. To learn more, visit us at www.mindspeed.com. Safe Harbor Statement This press release contains statements relating to Mindspeed, and our future results, including certain projections and business trends, that are "forward-looking statements" as defined in the Private Securities Litigation Reform Act of 1995. Actual results, and actual events that occur, may differ materially from those projected as a result of certain risks and uncertainties. These risks and uncertainties include, but are not limited to: market demand for our new and existing products and our ability to increase our revenues; our ability to maintain operating expenses within anticipated levels; our ability to reduce our cash consumption; availability and terms of capital needed for our business; constraints in the supply of wafers and other product components from our third-party manufacturers; our ability to successfully and cost effectively establish and manage operations in jurisdictions with low cost structures; the ability to attract and retain qualified personnel; successful development and introduction of new products; our ability to obtain design wins and develop revenues from them; pricing pressures and other competitive factors; order and shipment uncertainty; changes in our customers' inventory levels and inventory management practices; fluctuations in manufacturing yields; product defects; and intellectual property infringement claims by others and the ability to protect our intellectual property, as well as other risks and uncertainties, including those detailed from time to time in our Securities and Exchange Commission filings. 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