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Texas Instruments Assigned Patent for Apparatus and Method for Reducing Interference Signals in Integrated Circuit Using Multiphase Clocks
[September 30, 2014]

Texas Instruments Assigned Patent for Apparatus and Method for Reducing Interference Signals in Integrated Circuit Using Multiphase Clocks


(Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service ALEXANDRIA, Va., Sept. 30 -- Texas Instruments, Dallas, has been assigned a patent (8,842,766) developed by seven co-inventors for an "apparatus and method for reducing interference signals in an integrated circuit using multiphase clocks." The co-inventors are Indu Prathapan, Bangalore, India, Anjana Ghosh, Bangalore, India, Diganta Baishya, Bangalore, India, Sundarrajan Rangachari, Trichy, India, Sankar Prasad Debnath, Bangalore, India, Ranjit Kumar Dash, Chennai, India, and Srinath Mathur Ramaswamy, Palakkad, India.



The patent application was filed on March 31, 2010 (12/752,082). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=88,42,766.PN.&OS=PN/88,42,766&RS=PN/88,42,766 Written by Balkishan Dalai; edited by Jaya Anand.

BD0930JA0930-1065333 (c) 2014 Targeted News Service

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