[May 25, 2013] National Semiconductor Assigned Patent Tweet (Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service ALEXANDRIA, Va., May 25 -- National Semiconductor, Santa Clara, Calif., has been assigned a patent (8,445,353) developed by Venkat Raghavan, Union City, Calif., Sheldon Haynie, San Martin, Calif., and Andrew Strachan, Santa Clara, Calif., for a "method for integrating MIM capacitor and thin film resistor in modular two layer metal process and corresponding device." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for integrating a metal-insulator-metal (MIM) capacitor and a thin film resistor in an integrated circuit is provided that includes depositing a first metal layer outwardly of a semiconductor wafer substrate. A portion of the first metal layer forms a bottom plate for a MIM capacitor. A second metal layer is deposited outwardly of the first metal layer. A first portion of the second metal layer forms a top plate for the MIM capacitor and a second portion of the second metal layer forms contact pads for a thin film resistor." The patent application was filed on Sept. 29, 2009 (12/586,836). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,445,353&OS=8,445,353&RS=8,445,353 Written by Satyaban Rath; edited by Hemanta Panigrahi. SR0525HP0525-881152 (c) 2013 Targeted News Service [ Back To TMCnet.com's Homepage ]