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Mentor's Catapult HLS enables Chips&Media to deliver deep learning hardware accelerator IP in half the timeWILSONVILLE, Ore., Jan. 15, 2019 /PRNewswire/ -- Mentor®, a Siemens business, today announced that Chips&Media™ has successfully deployed Mentor's Catapult™ HLS Platform to design and verify their c.WAVE computer vision IP for detecting objects in real time, using a deep neural network (DNN) algorithm. Chips&Media is a leading provider of high-performance, high-quality video IP for system-on-chip (SoC) design that is widely deployed in markets such as automotive, surveillance, and consumer electronics. To quickly provide differentiated machine learning IP to customers, Chips&Media needed to increase their productivity dramatically by reducing functional verification time, timing closure, customization, and final optimization so they could spend more time in research and development for their machine algorithms and architecture. To accomplish these goals, they shifted away from their traditional hand-coded register transfer level (RTL) flow and adopted the Catapult HLS Platform to code their algorithms and testbenches using the C language. The HLS design and verification team cut their project time in half when compared to the team using an RTL flow on the same project. "To address the challenges of acceleration for inference-targeted devices, we believe it is key to have a hardware architecture that is focused and highly optimized for power, performance and area (PPA) using a deep neural network," said Mickey Jeon, chief technical officer of Chips&Media. "HLS enabled us to do this extrmely efficiently. Our project was an outstanding success, and we plan on deploying an HLS flow using Catapult on our next project." Characteristics of DNN-based computer vision processing include repetitive computations of multiply/add/accumulate operations, with massive data movement through neural network layers. The DNN is developed on a framework such as Caffe or TensorFlow™, and then the algorithm can be captured in a C model. Chips&Media refined this algorithmic C model into synthesizable C code and used the Catapult HLS Platform to rapidly explore various architectures and synthesize into RTL to find the optimal solution for this type of design. "In multiple application spaces where the market is rapidly changing, we are seeing adoption of Catapult HLS as the only way to achieve the kind of productivity required to succeed," said Badru Agarwala, general manager of Digital Design and Implementation Solutions at Mentor. "We have been working closely with Chips&Media to ensure a smooth transition to HLS. It has resulted in enabling them to focus their expertise on algorithm/architecture design rather than low-level implementation and debug details, thereby delivering their ideas to market much more quickly." For further detail, refer to the detailed case study: Chips&Media: Design and Verification of Deep Learning Object Detection IP. About Mentor's Catapult HLS Platform Contact for journalists Mentor Graphics Corporation, a Siemens business, is a world leader in electronic hardware and software design solutions, providing products, consulting services, and award-winning support for the world's most successful electronic, semiconductor, and systems companies. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. Web site: http://www.mentor.com. Mentor Graphics, Mentor and Catapult are registered trademarks of Mentor Graphics Corporation. TensorFlow is a trademark of Google, Inc. All other company or product names are the registered trademarks or trademarks of their respective owner.
View original content to download multimedia:http://www.prnewswire.com/news-releases/mentors-catapult-hls-enables-chipsmedia-to-deliver-deep-learning-hardware-accelerator-ip-in-half-the-time-300778072.html SOURCE Mentor, a Siemens business |