Spirent and Cadence Collaborate to Bring Advanced Chipset Testing to Pre-Silicon Verification
Spirent Communications plc (LSE:SPT), the leading provider of test and assurance solutions for next-generation devices and networks, today announced a collaboration with Cadence Design Systems, Inc., to deliver a joint networking system-on-chip (SoC) verification solution that bridges the gap between pre-silicon and post-silicon verification.
The collaboration brings sophisticated virtual Ethernet traffic emulation and testing capabilities to pre-silicon verification in the Cadence Palladium® Z2 Enterprise Emulation and Protium™ X2 Enterprise Prototyping systems. Highly scalable and flexible, the solution has the capacity to emulate any port speed from 1G to 800G at the application level, and quickly introduce additional features to enable new use cases as required.
Jointly developed by Spirent and Cadence, the solution is designed to enable the increasing data bandwidths needed to verify designs for data centers and other high-performance applications. The partnership combines the cutting-edge data rates and port densities of Spirent TestCenter with the industry-leading verification capabilities of the Cadence Palladium and Protium systems as a unified solution with reusable, portable, automated test cases.
"We are pleased to work with a leading computational software vendor to bridge the gap between pre- and post-silicon validation of next-generation networking products with this highly flexible and cost-effective solution," said Aniket Khosla, VP of product management for Cloud and IP at Spirent. "Our collaboration with Cadence provides access to the latest Chip Design Verification solution to help customers identify critical problems early in the design lifecycle and accelerate time to market for the latest innovations driving the industry. It will help reduce development time, simplify testing of the complex Ethernet chipset design process, and ensure that new products perform as expected."
Michael Young, senior product management group director, System and Verification Group at Cadence said: "Through our work with Spirent, Cadence is continuing our commitment to work with industry leaders to bring best-in-class solutions to the pre-silicon verification market. When integrated into the Palladium emulation and Protium prototyping sysems, Spirent's' Ethernet traffic emulation and test capabilities allow mutual customers to extend their verification with real-world traffic and scenarios, greatly reducing time to market."
Unique benefits of the joint solution include:
"Chip design is time-intensive, testing early at the pre-silicon design phase helps speed up time to market for the latest industry innovations by reducing issues and risks later in the development cycle" says Khosla. "The new unified test platform reduces testing complexity and accelerates the technology design and development of Ethernet chipsets."
For more information visit: www.spirent.com/campaign/accelerate-chipset-design-and-development-with-cadence, view this short video and download the Spirent Chip Design Verification Solution datasheet.
Spirent Communications plc. (LSE: SPT) is the leading global provider of automated test and assurance solutions for networks, cybersecurity, and positioning. The company provides innovative products, services and managed solutions that address the test, assurance and automation challenges of a new generation of technologies, including 5G, SD-WAN, cloud, autonomous vehicles and beyond. From the lab to the real world, Spirent helps companies deliver on their promise to their customers of a new generation of connected devices and technologies. For more information, please visit www.spirent.com and follow us on LinkedIn, Twitter and Facebook.
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