[October 03, 2017] |
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RISC-V Paper by Imperas at 15th International System-on-Chip (SoC) Conference 2017
Imperas
Software Ltd., the leader in high-performance software simulation
and virtual platforms, will participate in the 15th
International System-on-Chip (SoC) Conference, with Larry Lapides
presenting a paper: "RISC-V
Models and Simulation Enable Early Software Bring Up."
The 15th International System-on-Chip (SoC) Conference will be
held October 18 - 19, 2017 at the University of California, Irvine (UCI)
- Calit2. The theme for this year's conference is "Secure and
Intelligent Silicon Systems for Emerging Applications."
Paper: RISC-V Models and Simulation Enable Early Software Bring Up
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As RISC-V processor cores start to be designed into new SoCs, software
requirements need to be considered. One of the issues with moving to
RISC-V based SoCs is porting operating systems, drivers, firmware and
applications from existing platforms. Can this be easily accomplished?
Can it be accomplished, in the majority, before silicon is available?
Virtual platforms, or software simulation, can help accelerate this
porting and bring up process. Virtual platforms provide a near real
time software simulation environment for executing the actual sofware
binaries, plus have full debug, analysis and test tools.
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Now there are not only models of RISC-V processor cores - generic
RISC-V, SiFive, Andes; 32 and 64 bit cores - but also models of
platforms running operating systems. These Extendable Platform Kits
(EPKs) enable software engineers to quickly get started, months before
any hardware, even FPGA prototypes, are available. For example, there
is an EPK available of a Microsemi (News - Alert) platform, using a SiFive E31
RV32-based core, running FreeRTOS.
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Virtual platform environments also enable the use of debug, analysis
and test tools, not only for RISC-V, but in the case of a
heterogeneous platform, supporting the multiple processors on the
platform. Also, as Agile methods, including Continuous Integration
Continuous Test (CICT (News - Alert)) are adopted by embedded software teams, virtual
platforms with their ease of automation enable this technology to be
implemented.
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This presentation will provide a summary of the RISC-V processor
models available through the Open Virtual Platforms (OVP) website (www.OVPworld.org),
show a demo of the Imperas Microsemi E31/FreeRTOS EPK, and discuss the
use of virtual platforms in accelerating migration to RISC-V based
SoCs and improving software quality.
When: Exhibit and workshops, October 18 - 19, 2017. Paper
Wednesday October 18, 2:20 - 2:50PM.
Where: University of California, Irvine, 4100 Calit2 Bldg. #325,
Irvine, CA (News - Alert) 92697.
To set up meetings with Imperas, please email [email protected].
For more information on the 15th International System-on-Chip (SoC)
Conference, see http://www.socconference.com.
About Imperas
For more information about Imperas, please see www.imperas.com.
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and YouTube.
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Software Limited or their respective holders.
View source version on businesswire.com: http://www.businesswire.com/news/home/20171003005526/en/
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