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Rambus Engineers and Scientists to Present New Research and Demonstrations at DesignCon 2015Rambus (News - Alert) Inc. (NASDAQ:RMBS):
At DesignCon 2015, Rambus engineers and scientists will present four papers on the latest research in ultra-high speed interface design as well as showcase a wide range of silicon-proven R+™ enhanced standard memory and serial link core solutions at the Rambus booth (#835). In addition, Rambus will be demonstrating the recently announced On-chip Noise Monitor. Rambus engineers will also be hosting a full-day training workshop on January 28, covering key trends and challenges that are driving system and silicon architectures today and in the near future. Click to Tweet: @rambusinc will be exhibiting, speaking and training at @UBMDesignCon 2015 on 1/27-30 #Innovation #Designcon Paper Presentations:
Title: "Modeling and Analysis of Differential vs. Single-Ended
Signaling with Through-Silicon VIAS (TSVS) for Low-Power/High-Speed 3D
IC Channel Design"
Title: "Design and Characterization of Interconnects for Serial
Links Operating at 56 Gbps and Beyond"
Title: "Design and Simulation of Equalizer Adaptation Engine in
Multi-Protocol Serial Links"
Title: "Design and Characterization of a Low-Power, 6.4 Gbps Data
Rate DDR Memory Interface System"
Follow Rambus About Rambus Inc. Rambus brings invention to market. Our customizable IP cores, architecture licenses, tools, services, and training improve the competitive advantage of our customer's products while accelerating their time-to-market. Rambus products and innovations capture, secure and move data. For more information, visit rambus.com.
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