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Freescale Semiconductor Assigned Patent for Recovery Method for Poor Yield at Integrated Circuit Die Panelization(Targeted News Service Via Acquire Media NewsEdge) By Targeted News Service ALEXANDRIA, Va., Nov. 11 -- Freescale Semiconductor, Austin, Texas, has been assigned a patent (8,877,523) developed by George R. Leal, Cedar Park, Texas, for a "recovery method for poor yield at integrated circuit die panelization." The patent application was filed on June 22, 2011 (13/166,552). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,877,523.PN.&OS=PN/8,877,523&RS=PN/8,877,523 Written by Sudarshan Harpal; edited by Jaya Anand. SH1111JA1111-1077912 (c) 2014 Targeted News Service |