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U.S. Patents Awarded to Inventors in Oregon (Sept. 3)(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., Sept. 3 -- The following federal patents were awarded to inventors in Oregon. *** Intel Assigned Patent for Outphasing Power Combining By Antenna ALEXANDRIA, Va., Sept. 3 -- Intel, Santa Clara, California, has been assigned a patent (8,824,984) developed by Hongtao Xu, Beaverton, Oregon, Hemasundar M. Geddada, College Station, Texas, and Chang-Tsung Fu, Portland, Oregon, for "outphasing power combining by antenna." The patent application was filed on June 29, 2012 (13/537,103). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,824,984.PN.&OS=PN/8,824,984&RS=PN/8,824,984 Written by Sudarshan Harpal; edited by Jaya Anand. *** Ceterix Orthopaedics Assigned Patent ALEXANDRIA, Va., Sept. 3 -- Ceterix Orthopaedics, Menlo Park, California, has been assigned a patent (8,808,299) developed by three co-inventors for devices, systems and methods "for meniscus repair." The co-inventors are Justin D. Saliman, Los Angeles, George V. Anastas, San Carlos, California, and Alexander Jasso, Portland, Oregon. The patent application was filed on April 30, 2013 (13/873,841). The full text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8808299.PN.&OS=PN/8808299&RS=PN/8808299 Written by Eloisa Asedillo; edited by Vessie Ann Abalos. *** Synopsys Assigned Patent ALEXANDRIA, Va., Sept. 3 -- Synopsys, Mountain View, California, has been assigned a patent (8,826,193) developed by six co-inventors for the "detection and removal of self-aligned double patterning artifacts." The co-inventors are Yuelin Du, Champaign, Illinois, Gerard Luk-Pat, Sunnyvale, California, Alexander Miloslavsky, Sunnyvale, California, Benjamin Painter, Portland, Oregon, James Shiely, Aloha, Oregon, and Hua Song, San Jose, California. The patent application was filed on Feb. 27, 2013 (13/779,466). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,826,193.PN.&OS=PN/8,826,193&RS=PN/8,826,193 Written by Balkishan Dalai; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., Sept. 3 -- Intel, Santa Clara, California, has been assigned a patent (8,826,234) developed by Christopher J. Cormack, Hillsboro, Oregon, Nathaniel Duca, Menlo Park, California, and Jason Plumb, Portland, Oregon, for "relational modeling for performance analysis of multi-core processors." The patent application was filed on Dec. 23, 2009 (12/645,562). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,826,234.PN.&OS=PN/8,826,234&RS=PN/8,826,234 Written by Balkishan Dalai; edited by Jaya Anand. *** Intel Assigned Patent for Time-variant Antenna Enabled By Switched Capacitor Array on Silicon ALEXANDRIA, Va., Sept. 3 -- Intel, Santa Clara, California, has been assigned a patent (8,824,982) developed by Seong-Youp Suh, Portland, Oregon, and Ricardo Suarez-Gartner, Oceanside, California, for a "time-variant antenna enabled by switched capacitor array on silicon." The patent application was filed on June 27, 2012 (13/534,377). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,824,982.PN.&OS=PN/8,824,982&RS=PN/8,824,982 Written by Sudarshan Harpal; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., Sept. 3 -- Intel, Santa Clara, California, has been assigned a patent (8,826,103) developed by Kent Lusted, Aloha, Oregon, for "time protocol latency correction based on forward error correction status." The patent application was filed on Jan. 18, 2013 (13/744,704). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,826,103.PN.&OS=PN/8,826,103&RS=PN/8,826,103 Written by Balkishan Dalai; edited by Jaya Anand. *** Intel Assigned Patent for Methods and Apparatus for Protecting Digital Content ALEXANDRIA, Va., Sept. 3 -- Intel, Santa Clara, California, has been assigned a patent (8,824,679) developed by Priyadarsini Devanand, San Jose, California, and Gary L. Graunke, Hillsboro, Oregon, for "methods and apparatus for protecting digital content." The patent application was filed on March 13, 2012 (13/418,886). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,824,679.PN.&OS=PN/8,824,679&RS=PN/8,824,679 Written by Sudarshan Harpal; edited by Jaya Anand. *** Broadcom Assigned Patent ALEXANDRIA, Va., Sept. 3 -- Broadcom, Irvine, California, has been assigned a patent (8,826,094) developed by Andrew J. Blanksby, Lake Oswego, Oregon, and Alvin Lai Lin, Londonderry, United Kingdom, for "accumulating LDPC (low density parity check) decoder." The patent application was filed on Oct. 30, 2013 (14/067,198). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,826,094.PN.&OS=PN/8,826,094&RS=PN/8,826,094 Written by Balkishan Dalai; edited by Jaya Anand. *** Intel Assigned Patent for Mechanism for Facilitating Dynamically Prioritized Control of Calls Over Network ALEXANDRIA, Va., Sept. 3 -- Intel, Santa Clara, California, has been assigned a patent (8,824,998) developed by Eddie Balthasar, Folsom, California, Richard T. Beckwith, Portland, Oregon, and Cornelius V. Vick, Sacramento, California, for a "mechanism for facilitating dynamically prioritized control of calls over a network." The patent application was filed on Sept. 28, 2012 (13/630,772). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,824,998.PN.&OS=PN/8,824,998&RS=PN/8,824,998 Written by Sudarshan Harpal; edited by Jaya Anand. *** Symantec Assigned Patent for Selective File System Caching Based Upon Configurable Cache Map ALEXANDRIA, Va., Sept. 3 -- Symantec, Mountain View, California, has been assigned a patent (8,825,685) developed by four co-inventors for the "selective file system caching based upon a configurable cache map." The co-inventors are Edwin Menze, Portland, Oregon, Raghupathi Malige, San Jose, California, Bala Kumaresan, East Palo Alto, California, and Tillmann Reusse, Mountain View, California. The patent application was filed on Nov. 16, 2009 (12/619,417). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,825,685.PN.&OS=PN/8,825,685&RS=PN/8,825,685 Written by Deviprasad Jena; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., Sept. 3 -- Intel, Santa Clara, California, has been assigned a patent (8,825,987) developed by five co-inventors for "instruction and logic for processing text strings." The co-inventors are Michael A. Julier, Los Gatos, California, Jeffrey D. Gray, Portland, Oregon, Srinivas Chennupaty, Portland, Oregon, Sean P. Mirkes, Beaverton, Oregon, and Mark P. Seconi, Beaverton, Oregon. The patent application was filed on Dec. 20, 2012 (13/721,819). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,825,987.PN.&OS=PN/8,825,987&RS=PN/8,825,987 Written by Balkishan Dalai; edited by Jaya Anand. *** Intel Assigned Patent for Techniques for Authenticated Posture Reporting and Associated Enforcement of Network Access ALEXANDRIA, Va., Sept. 3 -- Intel, Santa Clara, California, has been assigned a patent (8,826,378) developed by five co-inventors for "techniques for authenticated posture reporting and associated enforcement of network access." The co-inventors are David Durham, Beaverton, Oregon, Ravi Sahita, Beaverton, Oregon, Karanvir Grewal, Hillsboro, Oregon, Ned Smith, Beaverton, Oregon, and Kapil Sood, Beaverton, Oregon. The patent application was filed on Dec. 22, 2009 (12/655,024). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=88,26,378.PN.&OS=PN/88,26,378&RS=PN/88,26,378 Written by Balkishan Dalai; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., Sept. 3 -- Intel, Santa Clara, California, has been assigned a patent (8,826,035) developed by David Durham, Beaverton, Oregon, Men Long, Hillsboro, Oregon, and Uday Savagaonkar, Beaverton, Oregon, for "cumulative integrity check value (ICV) processor based memory content protection." The patent application was filed on Dec. 23, 2009 (12/646,028). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,826,035.PN.&OS=PN/8,826,035&RS=PN/8,826,035 Written by Balkishan Dalai; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., Sept. 3 -- Intel, Santa Clara, California, has been assigned a patent (8,826,417) developed by Wah Yiu Kwong, Beaverton, Oregon, and Wayne L. Proefrock, Hillsboro, Oregon, for "providing a user input interface prior to initiation of an operating system." The patent application was filed on Dec. 7, 2010 (12/961,800). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=88,26,417.PN.&OS=PN/88,26,417&RS=PN/88,26,417 Written by Balkishan Dalai; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., Sept. 3 -- Intel, Santa Clara, California, has been assigned a patent (8,826,257) developed by five co-inventors for "memory disambiguation hardware to support software binary translation." The co-inventors are Muawya M. Al-Otoom, Beaverton, Oregon, Paul Caprioli, Hillsboro, Oregon, Abhay S. Kanhere, Fremont, California, Arvind Krishnaswamy, San Jose, California, and Omar M. Shaikh, Portland, Oregon. The patent application was filed on March 30, 2012 (13/435,165). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,826,257.PN.&OS=PN/8,826,257&RS=PN/8,826,257 Written by Balkishan Dalai; edited by Jaya Anand. For more information about Targeted News Service products and services, please contact: Myron Struck, editor, Targeted News Service LLC, Springfield, Va., 703/304-1897; [email protected]; http://targetednews.com. -1174234 (c) 2014 Targeted News Service |