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U.S. Patents Awarded to Inventors in New Jersey (Jan. 30)
[January 30, 2013]

U.S. Patents Awarded to Inventors in New Jersey (Jan. 30)

(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., Jan. 30 -- The following federal patents were awarded to inventors in New Jersey.

*** Siemens Assigned Patent for Container for Disparate Software Components ALEXANDRIA, Va., Jan. 30 -- Siemens, Iselin, N.J., has been assigned a patent (8,365,191) developed by Thomas Gruenewald, Somerset, N.J., Hartmut Ludwig, West Windsor, N.J., and Georg Muenzel, Plainsboro, N.J., for a "container for disparate software components." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A computer readable medium embodying instructions executable by a processor to perform a method for hosting components implemented in different computer readable languages within one process. The method includes instantiating a container within a single process, creating a hosting environment for each of a plurality of components, and wherein loading the components by respective environments and wherein the hosting environments are objects instantiated within the container and within the one process, and wherein the plurality of components are implemented in respective a computer readable language, and instantiating a container communication framework object within the container and the one process for processing serialized messages of the components, wherein specific language adapters convert data types of the components to a common implementation, wherein the messages of the plurality of components are processed within the container." The patent application was filed on Sept. 16, 2008 (12/211,319). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,365,191&OS=8,365,191&RS=8,365,191 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** HSBC Technologies Assigned Patent ALEXANDRIA, Va., Jan. 30 -- HSBC Technologies, Jersey City, N.J., has been assigned a patent (8,365,140) developed by four co-inventors for "automated methods and systems for developing and deploying projects in parallel." The co-inventors are Marc Heyhoe, Middletown, N.J., Dan Avidan, Aventura, Fla., Daron Finn, Flemington, N.J., and Daniel Lees, Clifton, N.J.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Embodiments of the invention are directed to system and method for managing parallel development of projects. One embodiment of the invention is a method of automatically managing processes in the parallel development of an application through a graphical user interface. The graphical user interface manages the automated processes, which are able to complete their tasks without further user interaction. The automated processes managed by the graphical user interface include, provisioning a first development environment and second development environment. The processes also includes deploying a second release of an application to the second development environment, and merging modifications to the second source code and the second content of the second release into a first source code and a first content of the first release. After the releases have been merged together, the process automatically deploys the third release of the application to a production environment for use by users." The patent application was filed on Dec. 17, 2008 (12/336,982). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,365,140&OS=8,365,140&RS=8,365,140 Written by Satyaban Rath; edited by Hemanta Panigrahi.


*** NEC Laboratories America Assigned Patent ALEXANDRIA, Va., Jan. 30 -- NEC Laboratories America, Princeton, N.J., has been assigned a patent (8,365,152) developed by four co-inventors for a "path-sensitive analysis through infeasible-path detection and syntactic language refinement." The co-inventors are Gogul Balakrishnan, Plainsboro, N.J., Sriram Sankaranarayanan, Plainsboro, N.J., Franjo Ivancic, Princeton, N.J., and Aarti Gupta, Princeton, N.J.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method for infeasible path detection includes performing a static analysis on a program to prove a property of the program. If the property is not proved, infeasible paths in the program are determined by performing a path-insensitive abstract interpretation. Information about such infeasible paths is used to achieve the effects of path-sensitivity in path-insensitive program analysis." The patent application was filed on July 31, 2008 (12/183,416). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,365,152&OS=8,365,152&RS=8,365,152 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Innovations Holdings Assigned Patent ALEXANDRIA, Va., Jan. 30 -- Innovations Holdings, Edgewater, N.J., has been assigned a patent (8,365,122) developed by Ewa Herbst, Edgewater, N.J., for a "method and apparatus for configurable systems." The abstract of the patent published by the U.S. Patent and Trademark Office states: "The present invention relates to a flexible analog/digital configuration, preferably on a chip, that can be used for receiving various inputs, processing those inputs, and displaying/communicating the results and/or providing a response thereto. More particularly, the present invention can measure multiple parameters and, when properly programmed, can easily organize the data from multiple sensors or other analog or digital sources. It can present or display different, or similar, pages for setting up each measurement (or each measured parameter) (e.g., by sensor, class of sensors, etc.) to enable an easy to use approach for individuals without needing to know the specifics as to many parameters. This user-friendly approach can be performed using a configurable chip module system. A configurable chip module system can include analog elements, digital elements, and connection elements between the analog and digital elements, where some of the analog elements and/or digital elements receive inputs from one or more sources and where some of the analog elements and/or digital elements generate output signals for generating control signals and/or outputs that present measurements to output receiving elements. The system includes a configuration mechanism that automatically configures the connection elements in response to receiving selections entered on a user interface, where the user interface allows a user to input commands to modify the structure of the chip module system." The patent application was filed on April 12, 2011 (13/085,366). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,365,122&OS=8,365,122&RS=8,365,122 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Rhodia Chimie Assigned Patent ALEXANDRIA, Va., Jan. 30 -- Rhodia Chimie, Boulogne-Billancourt, France, has been assigned a patent (8,357,724) developed by Sophie Deroo, L'Hay-les-Roses, France, and Mikel Morvan, Princeton, N.J., for a "method for controlling the stability or the droplets size of simple water-in-oil emulsions, and stabilized simple water-in-oil emulsions." The abstract of the patent published by the U.S. Patent and Trademark Office states: "The invention concerns a process for controlling the stability or the droplets sized of simple water-in-oil emulsions, wherein a di-block or tri-block copolymer is used. A block is a hydrophilic block, the other block is a hydrophobic block. The invention concerns also a stabilized water-in-oil emulsion." The patent application was filed on May 16, 2006 (11/435,041). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,357,724.PN.&OS=PN/8,357,724&RS=PN/8,357,724 Written by Kusum Sangma; edited by Anand Kumar.

*** Verizon Patent and Licensing Assigned Patent ALEXANDRIA, Va., Jan. 30 -- Verizon Patent and Licensing, Basking Ridge, N.J., has been assigned a patent (8,364,903) developed by five co-inventors for a "field level concurrency and transaction control for out-of-process object caching." The co-inventors are Amit Singh, Irving, Texas, Tarun Jindal, Irving, Texas, Tao Yang, The Colony, Texas, Fairborz Ebrahimi, Basking Ridge, N.J., and Dinyar Kavouspour, Plano, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method includes executing a multi-threaded, object-oriented application (OOA) on a device; receiving, by multiple threads of the OOA, an object from an out-of-process cache memory; mutating one or more fields of the object, wherein the one or more fields correspond to one or more attributes of the object; and applying an update of the one or more fields that have been mutated to the out-of-process cache memory, wherein the applying the update updates the one or more fields mutated at a field level and not at an object level." The patent application was filed on Dec. 22, 2009 (12/644,125). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,364,903.PN.&OS=PN/8,364,903&RS=PN/8,364,903 Written by Kusum Sangma; edited by Anand Kumar.

*** Ternarylogic Assigned Patent ALEXANDRIA, Va., Jan. 30 -- Ternarylogic, Morristown, N.J., has been assigned a patent (8,364,977) developed by Peter Lablans, Morris Township, N.J., for "methods and systems for processing of n-state symbols with XOR and EQUALITY binary functions." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Multi-valued or n-state with n=2.sup.p Linear Feedback Shift Registers (LFSRs) in binary form are provided for scramblers, descramblers and sequence generators using addition and multiplication functions over a Finite Field GF(n) in binary form. N-state switching functions in an LFSR are implemented by using implementations of reversible binary functions. LFSRs may be in Fibonacci or in Galois configuration. N-state LFSR based sequence generators in binary form for generating an n-state maximum length sequence in binary form are also provided. A method for simple correlation calculation is provided. Communication systems and data storage systems using the LFSRs are also disclosed." The patent application was filed on June 12, 2008 (12/137,945). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,364,977.PN.&OS=PN/8,364,977&RS=PN/8,364,977 Written by Kusum Sangma; edited by Anand Kumar.

*** LSI Assigned Patent for Method and Apparatus for Non-uniform Redundancy Packet Error Correction ALEXANDRIA, Va., Jan. 30 -- LSI, Milpitas, Calif., has been assigned a patent (8,365,046) developed by Ximing Chen, Ringoes, N.J., Chengzhou Li, Bridgewater, N.J., and Herbert B. Cohen, Allentown, Pa., for a "method and apparatus for non-uniform redundancy packet error correction." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for correcting at least one error in a data transmission over a packet-based communication network includes the steps of: generating a sequence of data packets for transmission over the packet-based communication network, the sequence of data packets being arranged into a plurality of packet frames, each of at least a subset of the packet frames including at least a primary data packet and a number of redundant data packets which is a function of a prescribed redundancy pattern, the subset of packet frames having a non-uniform distribution of redundant data packets therein; transmitting the sequence of data packets over the communication network; and recovering at least one missing data packet in the sequence of data packets using at least one corresponding redundant data packet in at least one subsequently received packet frame when the missing data packet is identified in a receiver of the sequence of data packets." The patent application was filed on Nov. 23, 2010 (12/953,405). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,365,046.PN.&OS=PN/8,365,046&RS=PN/8,365,046 Written by Kusum Sangma; edited by Anand Kumar.

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