UNITED STATES : Lattice Ships More Than 20 Million Programmable Mixed Signal Product [TendersInfo (India)]
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[February 14, 2012]

UNITED STATES : Lattice Ships More Than 20 Million Programmable Mixed Signal Product [TendersInfo (India)]

(TendersInfo (India) Via Acquire Media NewsEdge) Lattice Semiconductor Corporation today announced that it has shipped more than 20 million programmable mixed signal devices. Fast-growing, worldwide adoption is spread over key mixed-signal device families including the Lattice Power Manager II, the newly released Platform Manager, and ispClock families. Lattice programmable mixed-signal devices are used in a range of applications from low-cost solid state drives to complex high-end telecommunication infrastructure cards.


The Power Manager family was the first programmable mixed-signal device family created by Lattice. Responding to customer need for integration and true "management," Lattice defined the industry's first PLD-based flexible power management system: a fully integrated device providing hot-swap controller, voltage supervisor, reset generator, and sequencer ICs into a single chip solution that is significantly less expensive and more accurate than other solutions.

As circuit board control plane functionality became increasingly popular among the company's broad customer base, Lattice developed the Platform Manager family, extending the functionality of power management to include both power and digital management within a single-chip solution. All Power Manager II functions are supported in Platform Manager devices. Integration allows the Power Manager device to have a quick response time that enables the fault logging application to capture the initial error condition. Fault logging that is implemented with discrete ICs or a microprocessor is typically too slow to catch the initial event, making troubleshooting difficult.


As the complexity of SoCs continues to increase, efficient clock management becomes more difficult. In response to this challenge, Lattice created the ispClock family, a mixed-signal standard clock net solution device that fully integrates clock generators and clock distribution, providing a low-cost programmable skew solution. A single chip product, the ispClock device from Lattice replaces an assortment of zero delay buffers, fan-out buffers, termination resistors, delay lines and serpentine clock trace layouts. Lattice's ispClock devices can be programmed in-system to generate multiple clock frequencies, compensate each output for differences in clock trace lengths, precisely match trace impedances and drive clock nets with different signaling requirements.

"We used all of the resources available on the Power Manager POWR1014A device, from the on-board ADC to the MOSFET drivers," said Wayne Kuei, Research and Development Director, Advantech Co., Ltd. "The Power Manager device helped us achieve our goals of reduced cost, stability, functionality and simplified component sources, resulting in a simpler and more cost effective BOM." (c) 2012 Euclid Infotech Pvt. Ltd. Provided by Syndigate.info an Albawaba.com company

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