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September 2001

Scot Robertson

Super Density Softswitch: Introducing A New Class Of Media Gateway

BY SCOT ROBERTSON


The revolution in optical networking and optical transport technology generates huge bandwidth increases in both existing fiber and new installations. Massive volumes of calls can be delivered over one fiber at a very low cost per call. As a result, when fiber is used to its full potential, significant economic benefits can be realized. However, taking advantage of this opportunity requires big investments in dependable equipment that will provide reliable service over time yet have the flexibility to support the evolving role of voice over IP as new standards, protocols, and technologies emerge.

Enabling The Service Provider
The development of super density media gateways, defined as supporting 50,000 ports or greater, and softswitches are important steps that will enable service providers to take advantage of these massive economies of scale.

The media gateway is the concentrating element that provides the access between the circuit switch network or another network, connecting clients (LANs) to backbone networks (WANs). It works within softswitch protocols and performs the translation of the packetized voice to and from other sources such as a circuit switch or an incompatible packet network such as a digital wireless networks. The switches in a packet network, unlike switches in a circuit network, have no physical interaction with the packets themselves. Rather, these softswitches serve as command and control units that specify packet destination and help determine the quality of service and other important service criteria relating to the communications routing path. Since calls are aggregated into media gateways and through routers as they transverse the packet network, the switching function can be centralized such that a softswitch can control routers throughout the geometric region of an entire network, with enormous economies in supporting high volumes of calls.

Gateway Challenges
The real challenge is posed with the super density gateways, and the problem of handling tens of thousands of ports with the physical limits of space and power consumption. In addition to the sheer volume, the gateway provides system control and signal control functions to route the packets to and from voice processing cards and deliver the right packets to the right place without a lot of system overhead, which is nevertheless essential for interfacing to an edge router.

One major bottleneck is the packet processing supported by the voice processing board. It is a bottleneck because the packet processor has to do all of the work of packet distribution, multiplexing, and aggregation across the DSP farm supporting thousands of calls. Packet processing is always a race between the bandwidth that's demanded and the latest technology. When the system is scaled with more and more ports, as more DSPs with greater capacity fit on a single card, scaling the packet processor in tandem is a problem since all the packets have to flow through that one packet processor element. If it can't keep up, the benefits of scaling and the attendant economies are lost.

The standard approach in dealing with the problem of bandwidth increases for the packet processor is the creation of a tree-like topology that layers a packet processor with a sub-group of DSPs for port capacity. New sub groups consisting of a packet processor and DSPs support bandwidth demand increases but over time this layering can become very expensive. In addition, it is difficult to scale incrementally, because each layer requires both a packet processor and sub group of DSPs.

Solutions
The ideal solution is simply to increase the capacity of the packet processor by adding a higher speed packet processor and other accelerators to work with it. However, the bandwidth race never stops. So another solution is to let the DSPs take on major packet processing and media gateway control tasks and let the packet processor itself concentrate on the packet distribution function and nothing else. In fact, the key to a more scalable and lower cost media gateway is by developing DSP technology to perform packet processing functions, exclusive of distribution, at the packet and sub-packet level.

Emerging DSP technology has to support scalability within the media gateway because the amount of ports that each DSP can handle varies with the different applications (e.g., FAX, high-quality voice, low-bandwidth voice, H.323, etc.). Equally important is that the media gateway must be flexible to handle a wide range of protocols for voice processing. Most of the carrier class media gateways are migrating to G.711 Annex 2, which provides a standard, well-defined voice coding with voice activity detection and comfort noise insertion (comfort tone). But there are a large number of legacy protocols.

Consequently, the DSP needs to be flexible and have the full range of capabilities depending on which legacy standards are supported to support a packet processing burden that changes with the type of interoperability standard. Finally, there is a bright, but largely unknown future for voice coding to provide higher then toll quality speech or high fidelity audio and a host of new applications supported by even newer standards.

New audio coding standards or higher compression standards require a flexible, upgradeable DSP technology. As a result, the packet processing has to be adjustable to accommodate different numbers of ports. The simplest, scalable media gateway architecture is an array of DSPs that are identical and all have a flexible capability in terms of speech processing and packet processing. As a result, DSPs can be added to balance the path between packet processing and voice processing seamlessly, since both are in a single processing element. This configuration provides the best granularity of scalability and flexibility for new applications.

Scot Robertson is product line manager at Analog Devices, Inc. Analog Devices is a semiconductor company that develops, manufactures, and markets high-performance integrated circuits (ICs) used in signal-processing applications.

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