Telecom Platform Deployment Featured Article

At the recently held International Supercomputing conference, telecom platform deployment provider Intel (News - Alert) revealed the production schedule details of its new co-processors—Xeon Phi – that are comprised within the Many Integrated Cores Architecture (MIC) Xeon family.

Previously codenamed as "Knight's Corner," Xeon Phi co-processors are available in PCIe form factor. They leverage the latest generation of Intel's Xeon family processors and motherboards with direct support of PCIe 3.0, according to a blog post written by David Chernicoff.

Xeon Phi co-processors are optimized for highly parallel supercomputing tasks such as weather prediction, oil exploration, pharma modeling, and a number of other applications. Future generations of the co-processor may find applications in data centers and high-end workstation workloads as well.

Following this announcement at the event, more than 40 Intel partners have committed to make use of the Xeon Phi in their supercomputer roadmaps. Most of these partners are focused on the high performance computing (HPC) opportunities these co-processors bring. With these processor solutions, HPC will expand beyond its traditional market and will be pushed down to more server-based applications in the near future. 

Xeon Phi, revealed by the post, uses Intel's 22nm, 3-D tri-gate transistor technology. The co-processors will complement the Xeon processors currently found in 70 percent of the top 500 supercomputers in the world. 

Further, the Intel Xeon family of processors is continuing to gain adoption in the storage and security market. In fact, in a recent survey published by NEI, 40 percent of participants from storage companies and 36 percent from the security industry are planning to migrate to the newest Sandy Bridge platform in the next year, followed by telecom (35 percent) and network management (23 percent) verticals.

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