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Concept Engineering unveiled the new S-engine, which provides enhanced, automatic, schematic generation taking transistor-level visualization to greater levels of abstraction. This is a follow-up to the T-engine, an electronic design automation (EDA) tool in the company’s NlView Widget platform.

The Germany-based company specializes in providing visualizing and debugging technology for electronic circuits and systems, including automatic schematic generation technology for all major design levels. Its solutions help electronic design engineers to understand, debug, optimize and document electronic designs.

Gerhard Angst, CEO and president of Concept Engineering, said, “As design complexity continues to grow and design teams use more and more in-house or third-party IP as part of their SoC, NoC or IP creation, the need for visualization and design technology at the IP level and system level becomes increasingly important”.

The new S-engine further optimizes the Nlview Widget platform by adding smart editing capabilities at the system level, in addition to the visualization features. Developers can now create tools for automated intellectual property (IP) and system-on-chip (SoC) assembly.

Officials explained that by integrating S-engine into high-level synthesis tools, the synthesis process can obtain greater control and visibility. Also S-engine’s automatic schematic generation provides visualization of interface connections and intelligent IP-on-the-fly management. This helps handle configurable IP building blocks.

The visualization, assembly features, and IP editing features of S-engine will help system designers to instantiate, configure and connect the various design elements of SoCs. Higher levels of abstraction will help in the creation of tools that enable system exploration, system definition and the visualization of system descriptions derived from SystemC, SystemVerilog and other high-level description languages.

The software technology provided by Concept are used widely in the EDA market in RTL development, IP reuse, logic synthesis, design verification, test automation and in many other use cases.

Concept Engineering and Verific Design Automation have joined hands to provide a connectivity package that links Concept Engineering’s Nlview schematic generator and visualization engine with Verific’s netlist database.

VVDI-Link gives Nlview, used within EDA tools to automatically create and visualize schematics for different levels of electronic circuits, direct access to the Verific database of industry-standard, IEEE (News - Alert)-compliant SystemVerilog, and VHDL parsers.