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September 16, 2008

Fresco Selects Berkeley's Analog FastSPICE

By Anil Sharma, TMCnet Contributing Editor

Berkeley Design Automation Inc., provider of Precision Circuit Analysis technology for advanced analog and RF integrated circuits (ICs), today announced that Fresco Microchip Inc. has adopted its Analog FastSPICE circuit simulator and Noise Analysis Option device noise analyzer for verification of their nanometer-scale ICs.



 
"At Fresco, we pride ourselves on being able to deliver high performance, superior quality products to our customers whom are addressing the growing analog-digital broadcast market," said Dr. Stephen Jantzi, director of Analog/RF Design at Fresco Microchip.
 
"Our low-power, single-chip TV receivers require extensive complex-block characterization, full-circuit performance simulation and transistor-level noise analysis. Traditional and accelerated SPICE tools do not have the capacity, performance, and accuracy for our complex circuits. With Analog FastSPICE, we are characterizing our complex analog/RF circuits 5x-12x faster than traditional SPICE with true SPICE accuracy and are able to simulate top-level circuits. We use the Noise Analysis Option on our sigma-delta ADC, and its results correlate very well with silicon measurements."
 
Berkeley Design Automation tools encompass Analog FastSPICE circuit simulation, Noise Analysis Option device noise analyzer, RF FastSPICE periodic analyzer, and PLL Noise Analyzer. The company guarantees identical waveforms to the leading "golden" SPICE simulators down to noise floor (typically 0.1 percent or less) while providing 5x-10x higher performance and 5x-10x higher capacity.
 
Advanced algorithms and numerical analysis techniques to rapidly solve the full-circuit matrix and the original device equations make it possible to achieve this without compromising on the accuracy.
 
The Berkeley tools have typical applications which include characterizing complex blocks (e.g., PLLs, ADCs, DC:DC converters, PHYs, Tx/Rx chains) and running performance simulation of full circuits (e.g., wireless transceivers, wireline transceivers, high-speed I/O macros, memories, microcontrollers, data converters, and power converters).
 
"We are delighted that Fresco Microchip has selected Analog FastSPICE and Noise Analysis Option for their hybrid TV receiver verification flow," said Ravi Subramanian, president and CEO of Berkeley. "Delivering critical semiconductors to bridge the analog-digital broadcast TV divide around the world, is a tremendous challenge involving advanced RF technologies. Fresco Microchip selection of BDA tools further validates the strong competitive advantage we provide to leading-edge designers of highly-integrated analog/ RF applications."
 
INTERNET TELEPHONY Conference & EXPO — the biggest and most comprehensive IP communications event of the year — is going on this week (September 16-18, 2008) in Los Angeles, California! The show features three valuable days of exhibits, conferences, and networking opportunities you can’t afford to miss. Be sure to check out TMCnet.com and blogs from Rich Tehrani, Greg Galitzine, and Tom Keating for news highlights from the show. See you there!

Anil Sharma is a contributing editor for TMCnet. To read more of Anil's articles, please visit his columnist page.

Edited by Eve Sullivan







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